Issued Patents 2019
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10504799 | Distinct gate stacks for III-V-based CMOS circuits comprising a channel cap | Takashi Ando, Renee T. Mo, Vijay Narayanan | 2019-12-10 |
| 10468432 | BEOL cross-bar array ferroelectric synapse units for domain wall movement | Jin-Ping Han, Ramachandran Muralidhar, Paul M. Solomon, Dennis M. Newns | 2019-11-05 |
| 10396077 | Patterned gate dielectrics for III-V-based CMOS circuits | Takashi Ando, Renee T. Mo, Vijay Narayanan, John Rozen | 2019-08-27 |
| 10381431 | Artificial synapse with hafnium oxide-based ferroelectric layer in CMOS back-end | Takashi Ando, Xiao Sun, Jin-Ping Han, Vijay Narayanan | 2019-08-13 |
| 10373835 | Method of lateral oxidation of nFET and pFET high-K gate stacks | Takashi Ando, Robert H. Dennard | 2019-08-06 |
| 10319818 | Artificial synapse with hafnium oxide-based ferroelectric layer in CMOS front-end | Takashi Ando, Xiao Sun, Jin-Ping Han, Vijay Narayanan | 2019-06-11 |
| 10262999 | High-k gate dielectric and metal gate conductor stack for fin-type field effect transistors formed on type III-V semiconductor material and silicon germanium semiconductor material | Takashi Ando, Pranita Kerber, Vijay Narayanan | 2019-04-16 |
| 10243143 | Heterogeneous nanostructures for hierarchal assembly | Shu-Jen Han, George S. Tulevski | 2019-03-26 |
| 10217745 | High-K gate dielectric and metal gate conductor stack for fin-type field effect transistors formed on type III-V semiconductor material and silicon germanium semiconductor material | Takashi Ando, Pranita Kerber, Vijay Narayanan | 2019-02-26 |
| 10205097 | Dielectric treatments for carbon nanotube devices | Damon B. Farmer, Shu-Jen Han | 2019-02-12 |
| 10170550 | Stressed nanowire stack for field effect transistor | Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2019-01-01 |