Issued Patents 2018
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10160638 | Method and apparatus for a semiconductor structure | Li-Cheng Chu, Ping-Yin Liu, Yuan-Chih Hsieh, Lan-Lin Chao, Chun-Wen Cheng | 2018-12-25 |
| 10128209 | Wafer bonding process and structure | Ping-Yin Liu, Lan-Lin Chao, Cheng-Tai Hsiao, Hsun-Chung Kuang | 2018-11-13 |
| 10103122 | Hybrid bonding systems and methods for semiconductor wafers | Ping-Yin Liu, Shih-Wei Lin, Lan-Lin Chao, Chia-Shiung Tsai | 2018-10-16 |
| 10049901 | Apparatus and method for wafer level bonding | Ping-Yin Liu, Yen-Chang Chu, Lan-Lin Chao, Yeur-Luen Tu, Ru-Liang Lee | 2018-08-14 |
| 10037968 | Alignment systems and wafer bonding systems and methods | Xiaomeng Chen, Ping-Yin Liu, Lan-Lin Chao | 2018-07-31 |
| 10013523 | Full-chip assessment of time-dependent dielectric breakdown | Valeriy Sukharev | 2018-07-03 |
| 9960129 | Hybrid bonding mechanisms for semiconductor wafers | Ping-Yin Liu, Szu-Ying Chen, Chen-Jong Wang, Chih-Hui Huang, Lan-Lin Chao +3 more | 2018-05-01 |
| 9953847 | Apparatus and method for cleaning | Ping-Yin Liu, Lan-Lin Chao | 2018-04-24 |
| 9917069 | Hybrid bonding system and cleaning method thereof | Ping-Yin Liu, Yeong-Jyh Lin, Chia-Shiung Tsai | 2018-03-13 |
| 9887155 | Multiple metal layer semiconductor device and low temperature stacking method of fabricating the same | Ping-Yin Liu, Kai-Wen Cheng, Lan-Lin Chao, Chia-Shiung Tsai, Xiaomeng Chen | 2018-02-06 |