Issued Patents 2017
Showing 101–123 of 123 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9608063 | Nanowire transistor structures with merged source/drain regions using auxiliary pillars | Ali Khakifirooz, Alexander Reznicek | 2017-03-28 |
| 9595525 | Semiconductor device including nanowire transistors with hybrid channels | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-03-14 |
| 9595595 | Method of forming field effect transistors (FETs) with abrupt junctions and integrated circuit chips with the FETs | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-03-14 |
| 9589827 | Shallow trench isolation regions made from crystalline oxides | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek, Charan V. Surisetty | 2017-03-07 |
| 9583507 | Adjacent strained <100> NFET fins and <110> PFET fins | Kangguo Cheng, Bruce B. Doris, Alexander Reznicek | 2017-02-28 |
| 9583599 | Forming a fin using double trench epitaxy | Veeraraghavan S. Basker, Shogo Mochizuki, Alexander Reznicek | 2017-02-28 |
| 9583572 | FinFET devices having silicon germanium channel fin structures with uniform thickness | Veeraraghavan S. Basker, Keith E. Fogel, Alexander Reznicek | 2017-02-28 |
| 9576858 | Dual work function integration for stacked FinFET | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-02-21 |
| 9570300 | Strain relaxed buffer layers with virtually defect free regions | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-02-14 |
| 9570575 | Capacitor in strain relaxed buffer | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-02-14 |
| 9570551 | Replacement III-V or germanium nanowires by unilateral confined epitaxial growth | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-02-14 |
| 9570443 | Field effect transistor including strained germanium fins | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-02-14 |
| 9570360 | Dual channel material for finFET for high performance CMOS | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Alexander Reznicek | 2017-02-14 |
| 9570356 | Multiple gate length vertical field-effect-transistors | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-02-14 |
| 9570297 | Elimination of defects in long aspect ratio trapping trench structures | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-02-14 |
| 9564373 | Forming a CMOS with dual strained channels | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-02-07 |
| 9564326 | Lithography using interface reaction | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-02-07 |
| 9558950 | Overhang hardmask to prevent parasitic epitaxial nodules at gate end during source drain epitaxy | Kangguo Cheng, Shogo Mochizuki, Alexander Reznicek | 2017-01-31 |
| 9559013 | Stacked nanowire semiconductor device | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-01-31 |
| 9553107 | Shallow extension junction | Kevin K. Chan, Effendi Leobandung, Dae-Gyu Park, Min Yang | 2017-01-24 |
| 9543302 | Forming IV fins and III-V fins on insulator | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Alexander Reznicek | 2017-01-10 |
| 9536795 | Multiple threshold voltage trigate devices using 3D condensation | Karthik Balakrishnan | 2017-01-03 |
| 9536939 | High density vertically integrated FEOL MIM capacitor | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-01-03 |