Issued Patents 2016
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9530660 | Multiple directed self-assembly patterning process | Chin-Yuan Tseng, Chi-Cheng Hung, Kuan-Hsin Lo, Ru-Gun Liu, Tsai-Sheng Gau +1 more | 2016-12-27 |
| 9449880 | Fin patterning methods for increased process margin | Chin-Yuan Tseng, Chi-Cheng Hung, Chih-Ming Lai, Huan-Just Lin, Ru-Gun Liu +2 more | 2016-09-20 |
| 9431297 | Method of forming an interconnect structure for a semiconductor device | Yung-Hsu Wu, Cheng-Hsiung Tsai, Yu-Sheng Chang, Chia-Tien Wu, Chung-Ju Lee +4 more | 2016-08-30 |
| 9418868 | Method of fabricating semiconductor device with reduced trench distortions | Yung-Sung Yen, Chung-Ju Lee, Chia-Tien Wu, Ta-Ching Yu, Kuei-Shun Chen +4 more | 2016-08-16 |
| 9412649 | Method of fabricating semiconductor device | Yung-Sung Yen, Chung-Ju Lee, Chia-Tien Wu, Ta-Ching Yu, Kuei-Shun Chen +4 more | 2016-08-09 |
| 9383657 | Method and structure for lithography processes with focus monitoring and control | Jhih-Yu Wang, Chien-Yu Li, Iu-Ren Chen, Chi-Cheng Hung, Wei-Liang Lin | 2016-07-05 |
| 9323155 | Double patterning strategy for contact hole and trench in photolithography | Hsiao-Wei Yeh, Chih-An Lin, Chien-Wei Wang, Feng-Cheng Hsu | 2016-04-26 |
| 9307614 | Color temperature and illumination adjusting system, and method thereof | Feng-Ling Lin, Hui-Ying Chen, Po-Shen Chen, Yuan-Ching Chen | 2016-04-05 |
| 9281273 | Designed-based interconnect structure in semiconductor structure | Chih-Liang Chen, Chih-Ming Lai, Yung-Sung Yen, Kam-Tou Sio, Tsong-Hua Ou +3 more | 2016-03-08 |