Issued Patents 2016
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9524939 | Multiple edge enabled patterning | Ming-Feng Shieh, Ya Hui Chang, Ru-Gun Liu, Ken-Hsien Hsieh, Burn Jeng Lin | 2016-12-20 |
| 9478540 | Adaptive fin design for FinFETs | Shu-Min Chen, Pin-Dai Sue, Li-Chun Tien, Ru-Gun Liu | 2016-10-25 |
| 9390223 | Method of determining whether a layout is colorable | Wen-Li Cheng, Ming-Hui Chih, Chia-Ping Chiang, Ken-Hsien Hsieh, Wen-Chun Huang +1 more | 2016-07-12 |
| 9380709 | Method of cutting conductive patterns | Chin-Hsiung Hsu, Huang-Yu Chen, Wen-Hao Chen | 2016-06-28 |
| 9362119 | Methods for integrated circuit design and fabrication | Ken-Hsien Hsieh, Shih-Ming Chang, Wen-Chun Huang, Chih-Ming Lai, Ru-Gun Liu +1 more | 2016-06-07 |
| 9287125 | Multiple edge enabled patterning | Ming-Feng Shieh, Ya Hui Chang, Ru-Gun Liu, Ken-Hsien Hsieh, Burn Jeng Lin | 2016-03-15 |
| 9281273 | Designed-based interconnect structure in semiconductor structure | Chih-Liang Chen, Chih-Ming Lai, Yung-Sung Yen, Kam-Tou Sio, Chun-Kuang Chen +3 more | 2016-03-08 |
| 9262577 | Layout method and system for multi-patterning integrated circuits | Huang-Yu Chen, Ken-Hsien Hsieh, Chin-Hsiung Hsu | 2016-02-16 |