Issued Patents 2016
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9529268 | Systems and methods for improving pattern transfer | Chien-Fu Lee, Hoi-Tou Ng | 2016-12-27 |
| 9502261 | Spacer etching process for integrated circuit design | Ru-Gun Liu, Cheng-Hsiung Tsai, Chung-Ju Lee, Chih-Ming Lai, Chia-Ying Lee +6 more | 2016-11-22 |
| 9501601 | Layout optimization of a main pattern and a cut pattern | Kuei-Liang Lu | 2016-11-22 |
| 9465906 | System and method for integrated circuit manufacturing | — | 2016-10-11 |
| 9362132 | Systems and methods for a sequential spacer scheme | Ming-Feng Shieh, Ru-Gun Liu, Tsai-Sheng Gau | 2016-06-07 |
| 9361420 | System and method for optimization of an imaged pattern of a semiconductor device | Ming-Yo Chung, Tzu-Chun Lo, Ying-Hao Su | 2016-06-07 |
| 9362119 | Methods for integrated circuit design and fabrication | Tsong-Hua Ou, Ken-Hsien Hsieh, Wen-Chun Huang, Chih-Ming Lai, Ru-Gun Liu +1 more | 2016-06-07 |
| 9362169 | Self-aligned semiconductor fabrication with fosse features | Ken-Hsien Hsieh, Chih-Ming Lai, Ming-Feng Shieh, Ru-Gun Liu, Tsai-Sheng Gau | 2016-06-07 |
| 9356021 | Self-alignment for two or more layers and methods of forming same | Ru-Gun Liu, Ken-Hsien Hsieh, Ming-Feng Shieh, Chih-Ming Lai, Tsai-Sheng Gau | 2016-05-31 |
| 9293341 | Mechanisms for forming patterns using multiple lithography processes | — | 2016-03-22 |
| 9245763 | Mechanisms for forming patterns using multiple lithography processes | Ming-Feng Shieh, Chih-Ming Lai, Ru-Gun Liu, Tsai-Sheng Gau | 2016-01-26 |