Issued Patents 2011
Showing 26–42 of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7952146 | Grain growth promotion layer for semiconductor interconnect structures | Shom Ponoth | 2011-05-31 |
| 7951714 | High aspect ratio electroplated metal feature and method | Daniel C. Edelstein, Keith Kwong Hon Wong, Haining Yang | 2011-05-31 |
| 7948084 | Dielectric material with a reduced dielectric constant and methods of manufacturing the same | Louis L. Hsu, Jack A. Mandelman | 2011-05-24 |
| 7927995 | Adopting feature of buried electrically conductive layer in dielectrics for electrical anti-fuse application | Lawrence A. Clevenger, Timothy J. Dalton, Nicholas C. M. Fuller, Louis C. Hsu | 2011-04-19 |
| 7928570 | Interconnect structure | Shom Ponoth, David V. Horak, Takeshi Nogami | 2011-04-19 |
| 7928569 | Redundant barrier structure for interconnect and wiring applications, design structure and method of manufacture | Daniel C. Edelstein | 2011-04-19 |
| 7923712 | Phase change memory element with a peripheral connection to a thin film electrode | John C. Arnold, Lawrence A. Clevenger, Timothy J. Dalton, Michael C. Gaidis, Louis L. Hsu +2 more | 2011-04-12 |
| 7911025 | Fuse/anti-fuse structure and methods of making and programming same | Louis C. Hsu, Rajiv V. Joshi, Jack A. Mandelman | 2011-03-22 |
| 7906428 | Modified via bottom structure for reliability enhancement | Lawrence A. Clevenger, Timothy J. Dalton, Louis C. Hsu, Conal E. Murray, Carl Radens +1 more | 2011-03-15 |
| 7902061 | Interconnect structures with encasing cap and methods of making thereof | Lawrence A. Clevenger, Timothy J. Dalton, Louis C. Hsu, Carl Radens, Theodorus E. Standaert +1 more | 2011-03-08 |
| 7893520 | Efficient interconnect structure for electrical fuse applications | Lynne M. Gignac, Chao-Kun Hu | 2011-02-22 |
| 7892968 | Via gouging methods and related semiconductor structure | Shyng-Tsong Chen, Steven J. Holmes, David V. Horak, Takeshi Nogami, Shom Ponoth | 2011-02-22 |
| 7884018 | Method for improving the selectivity of a CVD process | Fenton R. McFeely | 2011-02-08 |
| 7884477 | Air gap structure having protective metal silicide pads on a metal feature | Griselda Bonilla, Daniel C. Edelstein, Satyanarayana V. Nitta, Takeshi Nogami, Shom Ponoth +1 more | 2011-02-08 |
| 7871935 | Non-plasma capping layer for interconnect applications | Conal E. Murray | 2011-01-18 |
| 7867895 | Method of fabricating improved interconnect structure with a via gouging feature absent profile damage to the interconnect dielectric | Keith Kwong Hon Wong | 2011-01-11 |
| 7867832 | Electrical fuse and method of making | Haining Yang | 2011-01-11 |