Issued Patents 2011
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8062982 | High yield plasma etch process for interlayer dielectrics | Daniel Fischer, Matthias Schaller, Kornelia Dittmar | 2011-11-22 |
| 8058731 | Technique for forming metal lines in a semiconductor by adapting the temperature dependence of the line resistance | Moritz Andreas Meyer, Eckhard Langer | 2011-11-15 |
| 8053354 | Reduced wafer warpage in semiconductors by stress engineering in the metallization system | Frank Koschinsky, Joerg Hohage | 2011-11-08 |
| 8043956 | Wire bonding on reactive metal surfaces of a metallization of a semiconductor device by providing a protective layer | Frank Kuechenmeister | 2011-10-25 |
| 8039958 | Semiconductor device including a reduced stress configuration for metal pillars | Alexander Platz, Frank Kuechenmeister | 2011-10-18 |
| 8039400 | Reducing contamination of semiconductor substrates during BEOL processing by performing a deposition/etch cycle during barrier deposition | Frank Koschinsky, Holger Schuehrer | 2011-10-18 |
| 7982313 | Semiconductor device including stress relaxation gaps for enhancing chip package interaction stability | Michael Grillberger | 2011-07-19 |
| 7867917 | Etch stop layer for a metallization layer with enhanced adhesion, etch selectivity and hermeticity | Joerg Hohage, Volker Kahlert | 2011-01-11 |