Issued Patents 2005
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6969886 | ONO fabrication process for reducing oxygen vacancy content in bottom oxide layer in flash memory devices | Hidehiko Shiraiwa, Arvind Halliyal, Jean Y. Yang, Inkuk Kang, Tazrien Kamal +1 more | 2005-11-29 |
| 6958511 | Flash memory device and method of fabrication thereof including a bottom oxide layer with two regions with different concentrations of nitrogen | Arvind Halliyal, Amir H. Jafarpour, Hidehiko Shiraiwa, Tazrien Kamal, Mark T. Ramsbey | 2005-10-25 |
| 6949433 | Method of formation of semiconductor resistant to hot carrier injection stress | Shiraiwa Hidehiko, Arvind Halliyal | 2005-09-27 |
| 6927145 | Bitline hard mask spacer flow for memory cell scaling | Jean Y. Yang, Mark T. Ramsbey, Tazrien Kamal, Emmanuil H. Lingunis | 2005-08-09 |
| 6894342 | Structure and method for preventing UV radiation damage in a memory cell and improving contact CD control | Angela T. Hui, Minh Van Ngo, Ning Cheng, Jean Y. Yang, Hirokazu Tokuno +2 more | 2005-05-17 |
| 6855608 | Method of fabricating a planar structure charge trapping memory cell array with rectangular gates and reduced bit line resistance | Mark T. Ramsbey, Mark Randolph, Jean Y. Yang, Hiroyuki Kinoshita, Cyrus E. Tabery +3 more | 2005-02-15 |