Issued Patents 2005
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6963108 | Recessed channel | Inkuk Kang, Hiroyuki Kinoshita, Jeff P. Erhardt | 2005-11-08 |
| 6958272 | Pocket implant for complementary bit disturb improvement and charging improvement of SONOS memory cell | Nga-Ching Wong, Sameer Haddad, Mark Randolph, Mark T. Ramsbey, Ashot Melik-Martirosian +2 more | 2005-10-25 |
| 6933219 | Tightly spaced gate formation through damascene process | Krishnashree Achuthan, Minh Van Ngo, Cyrus E. Tabery, Jean Y. Yang | 2005-08-23 |
| 6927145 | Bitline hard mask spacer flow for memory cell scaling | Jean Y. Yang, Mark T. Ramsbey, Jaeyong Park, Tazrien Kamal | 2005-08-09 |
| 6855608 | Method of fabricating a planar structure charge trapping memory cell array with rectangular gates and reduced bit line resistance | Mark T. Ramsbey, Mark Randolph, Jean Y. Yang, Hiroyuki Kinoshita, Cyrus E. Tabery +3 more | 2005-02-15 |