Issued Patents 2003
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6664153 | Method to fabricate a single gate with dual work-functions | Chew Hoe Ang, Eng Hua Lim, Randall Cher Liang Cha, Jia Zhen Zheng, Elgin Quek +1 more | 2003-12-16 |
| 6656643 | Method of extreme ultraviolet mask engineering | Subhash Gupta | 2003-12-02 |
| 6632712 | Method of fabricating variable length vertical transistors | Chew Hoe Ang, Eng Hua Lim, Randall Cher Liang Cha, Jia Zhen Zheng, Elgin Quek +1 more | 2003-10-14 |
| 6610604 | Method of forming small transistor gates by using self-aligned reverse spacer as a hard mask | Chew Hoe Ang, Eng Hua Lim, Randall Cher Liang Cha, Jia Zhen Zheng, Elgin Quek +1 more | 2003-08-26 |
| 6610575 | Forming dual gate oxide thickness on vertical transistors by ion implantation | Chew Hoe Ang, Eng Hua Lim, Cher Liang Cha, Jia Zhen Zheng, Elgin Quek +1 more | 2003-08-26 |
| 6605501 | Method of fabricating CMOS device with dual gate electrode | Chew Hoe Ang, Eng Hua Lim, Cher Liang Cha, Jia Zhen Zheng, Elgin Quek | 2003-08-12 |
| 6565664 | Method for stripping copper in damascene interconnects | Subhash Gupta, Simon Chooi, Paul Ho | 2003-05-20 |
| 6566260 | Non-metallic barrier formations for copper damascene type interconnects | Simon Chooi, Subhash Gupta, Sangki Hong | 2003-05-20 |
| 6544848 | Method to form an asymmetrical non-volatile memory device using small in-situ doped polysilicon spacers | Chew Hoe Ang, Eng Hua Lim, Randall Cher Liang Cha, Jia Zhen Zheng, Elgin Quek +1 more | 2003-04-08 |
| 6540841 | Method and apparatus for removing contaminants from the perimeter of a semiconductor substrate | Sudipto Ranendra Roy, Subhash Gupta, Simon Chooi, Xu Yi, Yakub Aliyu +2 more | 2003-04-01 |
| 6534393 | Method for fabricating local metal interconnections with low contact resistance and gate electrodes with improved electrical conductivity | Vijai Kumar Chhagan, Jian Xun Li | 2003-03-18 |
| 6531390 | Non-metallic barrier formations for copper damascene type interconnects | Simon Chooi, Subhash Gupta, Sangki Hong | 2003-03-11 |
| 6530380 | Method for selective oxide etching in pre-metal deposition | Vincent Sih, Simon Chooi, Zainab Ismail, Ping Yu Ee, Sang Yee Loong | 2003-03-11 |
| 6524910 | Method of forming dual thickness gate dielectric structures via use of silicon nitride layers | Wenhe Lin, Kin Leong Pey, Zhong Dong, Simon Chooi | 2003-02-25 |
| 6524963 | Method to improve etching of organic-based, low dielectric constant materials | Simon Chooi, Jian Xun Li | 2003-02-25 |
| 6521539 | Selective etch method for selectively etching a multi-layer stack layer | Xue Chun Dai, Chiew Wah Yap | 2003-02-18 |