Issued Patents 2003
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6664153 | Method to fabricate a single gate with dual work-functions | Chew Hoe Ang, Eng Hua Lim, Jia Zhen Zheng, Elgin Quek, Mei Sheng Zhou +1 more | 2003-12-16 |
| 6632712 | Method of fabricating variable length vertical transistors | Chew Hoe Ang, Eng Hua Lim, Jia Zhen Zheng, Elgin Quek, Mei Sheng Zhou +1 more | 2003-10-14 |
| 6613652 | Method for fabricating SOI devices with option of incorporating air-gap feature for better insulation and performance | Yeow Kheng Lim, Alex See, Tae Jong Lee, Wang Ling Goh | 2003-09-02 |
| 6610604 | Method of forming small transistor gates by using self-aligned reverse spacer as a hard mask | Chew Hoe Ang, Eng Hua Lim, Jia Zhen Zheng, Elgin Quek, Mei Sheng Zhou +1 more | 2003-08-26 |
| 6558994 | Dual silicon-on-insulator device wafer die | Yeow Kheng Lim, Alex See, Tae Jong Lee, Wang Ling Goh | 2003-05-06 |
| 6544848 | Method to form an asymmetrical non-volatile memory device using small in-situ doped polysilicon spacers | Chew Hoe Ang, Eng Hua Lim, Jia Zhen Zheng, Elgin Quek, Mei Sheng Zhou +1 more | 2003-04-08 |
| 6534390 | Salicide method for producing a semiconductor device using silicon/amorphous silicon/metal structure | Yung Fu Chong, Kin Leong Pey | 2003-03-18 |
| 6531386 | Method to fabricate dish-free copper interconnects | Victor Lim, Simon Chooi | 2003-03-11 |