Issued Patents 2003
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6667243 | Etch damage repair with thermal annealing | Mark T. Ramsbey, Nicholas H. Tripsas, Arvind Halliyal, Yider Wu | 2003-12-23 |
| 6653231 | Process for reducing the critical dimensions of integrated circuit device features | Uzodinma Okoroanyanwu, Chih-Yuh Yang | 2003-11-25 |
| 6630288 | Process for forming sub-lithographic photoresist features by modification of the photoresist surface | Uzodinma Okoroanyanwu, Chih-Yuh Yang | 2003-10-07 |
| 6620717 | Memory with disposable ARC for wordline formation | Tazrien Kamal, Scott A. Bell, Kouros Ghandehari, Mark T. Ramsbey, Jean Y. Yang | 2003-09-16 |
| 6617215 | Memory wordline hard mask | Arvind Halliyal, Tazrien Kamal, Minh Van Ngo, Mark T. Ramsbey, Jean Y. Yang +3 more | 2003-09-09 |
| 6589709 | Process for preventing deformation of patterned photoresist features | Uzodinma Okoroanyanwu, Chih-Yuh Yang | 2003-07-08 |
| 6562723 | Hybrid stack method for patterning source/drain areas | Bharath Rangarajan, Ursula Q. Quinto | 2003-05-13 |
| 6551923 | Dual width contact for charge gain reduction | Bharath Rangarajan | 2003-04-22 |
| 6537866 | Method of forming narrow insulating spacers for use in reducing minimum component size | Tuan Pham, Jusuke Ogura, Bharath Rangarajan, Simon S. Chan | 2003-03-25 |
| 6522013 | Punch-through via with conformal barrier liner | Robert Chen, Robert Dawson, Khanh Tran | 2003-02-18 |