WL

Wan-Yih Lien

VS Vanguard International Semiconductor: 7 patents #80 of 585Top 15%
WM Worldwide Semiconductor Manufacturing: 5 patents #9 of 58Top 20%
TSMC: 3 patents #5,465 of 12,232Top 45%
Overall (All Time): #327,040 of 4,157,543Top 8%
15
Patents All Time

Issued Patents All Time

Showing 1–15 of 15 patents

Patent #TitleCo-InventorsDate
7071478 System and method for passing particles on selected areas on a wafer Wen-Chin Lin, Denny Tang, Li-Shyue Lai, John Chern, Jyh-Chyurn Guo 2006-07-04
6876027 Method of forming a metal-insulator-metal capacitor structure in a copper damascene process sequence Chii-Ming Wu 2005-04-05
6673683 Damascene gate electrode method for fabricating field effect transistor (FET) device with ion implanted lightly doped extension regions Yi-Ming Sheu, Yi-Ling Chan, Da-Wen Lin, Carlos H. Diaz 2004-01-06
6338993 Method to fabricate embedded DRAM with salicide logic cell structure 2002-01-15
6303955 Dynamic random access memory with slanted active regions Meng-Jaw Cheng 2001-10-16
6211091 Self-aligned eetching process Meng-Jaw Cherng 2001-04-03
6136646 Method for manufacturing DRAM capacitor Kung Linliu 2000-10-24
6124165 Method for making openings in a passivation layer over polycide fuses using a single mask while forming reliable tungsten via plugs on DRAMs 2000-09-26
6103623 Method for fabricating a tungsten plug structure and an overlying interconnect metal structure without a tungsten etch back or CMP procedure Yi-Ping Lee 2000-08-15
6096579 Method for controlling the thickness of a passivation layer on a semiconductor device Wen-Shiang Liao 2000-08-01
6080664 Method for fabricating a high aspect ratio stacked contact hole Sen-Huan Huang, Yeur-Luen Tu 2000-06-27
6074952 Method for forming multi-level contacts Hao Liu, Erik S. Jeng, Bi-Ling Chen 2000-06-13
6037216 Method for simultaneously fabricating capacitor structures, for giga-bit DRAM cells, and peripheral interconnect structures, using a dual damascene process Hao Liu, Fu-Liang Yang, Tzu-Shih Yen 2000-03-14
6022776 Method of using silicon oxynitride to improve fabricating of DRAM contacts and landing pads Kung Linliu, Meng-Jaw Cherng 2000-02-08
6001717 Method of making local interconnections for dynamic random access memory (DRAM) circuits with reduced contact resistance and reduced mask set 1999-12-14