Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7122412 | Method of fabricating a necked FINFET device | Haur-Ywh Chen, Fang Chen, Kuo-Nan Yang, Fu-Liang Yang, Chenming Hu | 2006-10-17 |
| 6800516 | Electrostatic discharge device protection structure | Fu-Liang Yang, Yi-Ming Sheu | 2004-10-05 |
| 6784071 | Bonded SOI wafer with <100> device layer and <110> substrate for performance improvement | Haur-Ywh Chen, Kuo-Nan Yang, Fu-Liang Yang, Chenming Hu | 2004-08-31 |
| 6673683 | Damascene gate electrode method for fabricating field effect transistor (FET) device with ion implanted lightly doped extension regions | Yi-Ming Sheu, Da-Wen Lin, Wan-Yih Lien, Carlos H. Diaz | 2004-01-06 |
| 6674130 | High performance PD SOI tunneling-biased MOSFET | Kuo-Nan Yang, You-Lin Chu, Hou-Yu Chen, Fu-Liang Yang, Chenming Hu | 2004-01-06 |
| 6518105 | High performance PD SOI tunneling-biased MOSFET | Kuo-Nan Yang, You-Lin Chu, Hou-Yu Chen, Fu-Liang Yang, Chenming Hu | 2003-02-11 |