Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6351037 | Method for making polycide-to-polycide low contact resistance contacts for interconnections on integrated circuits | Ing-Ruey Liaw | 2002-02-26 |
| 6211091 | Self-aligned eetching process | Wan-Yih Lien | 2001-04-03 |
| 6174781 | Dual damascene process for capacitance fabrication of DRAM | Chang-Ming Dai | 2001-01-16 |
| 6150247 | Method for making polycide-to-polycide low contact resistance contacts for interconnections on integrated circuits | Ing-Ruey Liaw | 2000-11-21 |
| 6022776 | Method of using silicon oxynitride to improve fabricating of DRAM contacts and landing pads | Wan-Yih Lien, Kung Linliu | 2000-02-08 |
| 5943599 | Method of fabricating a passivation layer for integrated circuits | Liang-Gi Yao, Yeur-Luen Tu, Sen-Huan Huang, Kwong-Jr Tsai | 1999-08-24 |
| 5874359 | Small contacts for ultra large scale integration semiconductor devices without separation ground rule | Ing-Ruey Liaw, Jau-Hwang Ho | 1999-02-23 |
| 5719089 | Method for etching polymer-assisted reduced small contacts for ultra large scale integration semiconductor devices | Pei-Wen Li | 1998-02-17 |
| 5712202 | Method for fabricating a multiple walled crown capacitor of a semiconductor device | Ing-Ruey Liaw | 1998-01-27 |
| 5700731 | Method for manufacturing crown-shaped storage capacitors on dynamic random access memory cells | John Lin, Daniel Lee | 1997-12-23 |
| 5543345 | Method for fabricating crown capacitors for a dram cell | Ing-Ruey Liaw | 1996-08-06 |
| 5491104 | Method for fabricating DRAM cells having fin-type stacked storage capacitors | William W. Lee, Ing-Ruey Liaw | 1996-02-13 |