CD

Chang-Ming Dai

IT ITRI: 16 patents #195 of 9,619Top 3%
TSMC: 6 patents #3,824 of 12,232Top 35%
BC Beijing Boe Optoelectronics Technology Co.: 1 patents #919 of 1,352Top 70%
WM Worldwide Semiconductor Manufacturing: 1 patents #30 of 58Top 55%
BO BOE: 1 patents #7,844 of 12,373Top 65%
Overall (All Time): #171,120 of 4,157,543Top 5%
24
Patents All Time

Issued Patents All Time

Showing 1–24 of 24 patents

Patent #TitleCo-InventorsDate
11583856 Bio-information detection substrate and gene chip Shenkang Wu, Dongsheng Huang, Tingze Dong, Jianxing Shang, Yizhe Li +9 more 2023-02-21
7131102 Full sized scattering bar alt-PSM technique for IC manufacturing in sub-resolution era Chung-Hsing Chang, Jan-Wen You, Burn Jeng Lin 2006-10-31
7036108 Full sized scattering bar alt-PSM technique for IC manufacturing in sub-resolution era Chung-Hsing Chang, Jan-Wen You, Burn Jeng Lin 2006-04-25
7013453 Full sized scattering bar alt-PSM technique for IC manufacturing in sub-resolution ERA Chung-Hsing Chang, Jan-Wen You, Burn Jeng Lin 2006-03-14
6830702 Single trench alternating phase shift mask fabrication San-De Tzu, Chung-Hsing Chang, Chen-Hao Hsieh 2004-12-14
6711732 Full sized scattering bar alt-PSM technique for IC manufacturing in sub-resolution era Chung-Hsing Chang, Jan-Wen You, Burn Jeng Lin 2004-03-23
6660653 Dual trench alternating phase shift mask fabrication San-De Tzu, Ching-Hsing Chang 2003-12-09
6319568 Formation of silicon nitride film for a phase shift mask at 193 nm Lon Wang, H. L. Chen 2001-11-20
6291118 Elimination of proximity effect in photoresist Tsai-Sheng Gau 2001-09-18
6180512 Single-mask dual damascene processes by using phase-shifting mask 2001-01-30
6174781 Dual damascene process for capacitance fabrication of DRAM Meng-Jaw Cherng 2001-01-16
6045954 Formation of silicon nitride film for a phase shift mask at 193 nm Lon Wang, H. L. Chen 2000-04-04
6040119 Elimination of proximity effect in photoresist Tsai-Sheng Gau 2000-03-21
5976968 Single-mask dual damascene processes by using phase-shifting mask 1999-11-02
5935762 Two-layered TSI process for dual damascene patterning Jammy Chin-Ming Huang 1999-08-10
5916717 Process utilizing relationship between reflectivity and resist thickness for inhibition of side effect caused by halftone phase shift masks Chuen-Huei Yang 1999-06-29
5882996 Method of self-aligned dual damascene patterning using developer soluble arc interstitial layer 1999-03-16
5877076 Opposed two-layered photoresist process for dual damascene patterning 1999-03-02
5877075 Dual damascene process using single photoresist process Jammy Chin-Ming Huang 1999-03-02
5710076 Method for fabricating a sub-half micron MOSFET device with global planarization of insulator filled shallow trenches, via the use of a bottom anti-reflective coating Horng-Chang Dai, Chin-Lung Lin 1998-01-20
5691215 Method for fabricating a sub-half micron MOSFET device with insulator filled shallow trenches planarized via use of negative photoresist and de-focus exposure Hong Dai, Shih-Chang TAI 1997-11-25
5670281 Masks and methods of forming masks which avoid phase conflict problems in phase shifting masks 1997-09-23
5670404 Method for making self-aligned bit line contacts on a DRAM circuit having a planarized insulating layer 1997-09-23
5604157 Reduced notching of polycide gates using silicon anti reflection layer Jau-Hwang Ho, Lou G. Chine 1997-02-18