Issued Patents All Time
Showing 51–75 of 125 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8895435 | Polysilicon layer and method of forming the same | Chien-Liang Lin, Yun-Ren Wang, Ying-Wei Yen, Wen-Yi Teng | 2014-11-25 |
| 8853740 | Strained silicon channel semiconductor structure | Ted Ming-Lang Guo, Chin-I Liao, Chin-Cheng Chien, Shu-Yen Chan, Chun-Yuan Wu | 2014-10-07 |
| 8802524 | Method of manufacturing semiconductor device having metal gates | Po-Jui Liao, Tsung-Lung Tsai, Chien-Ting Lin, Shao-Hua Hsu, Yi-Wei Chen +15 more | 2014-08-12 |
| 8765588 | Semiconductor process | Pong-Wey Huang, Chang-Hung Kung, Wei-Hsin Liu, Ya-Hsueh Hsieh, Bor-Shyang Liao +2 more | 2014-07-01 |
| 8704294 | Semiconductor device having metal gate and manufacturing method thereof | Po-Jui Liao, Tsung-Lung Tsai, Chien-Ting Lin, Shao-Hua Hsu, Yeng-Peng Wang +6 more | 2014-04-22 |
| 8574990 | Method of manufacturing semiconductor device having metal gate | Po-Jui Liao, Tsung-Lung Tsai, Chien-Ting Lin, Shao-Hua Hsu, Shui-Yen Lu +6 more | 2013-11-05 |
| 8575043 | Semiconductor device and manufacturing method thereof | Tzu-Feng Kuo, Hsin-Huei Wu, Ching-I Li, Shu-Yen Chan | 2013-11-05 |
| 8536072 | Semiconductor process | Ching-Nan Hwang, Chi-Heng Lin, Chun-Yao Yang, Ger-Pin Lin, Ching-I Li | 2013-09-17 |
| 8476169 | Method of making strained silicon channel semiconductor structure | Ted Ming-Lang Guo, Chin-I Liao, Chin-Cheng Chien, Shu-Yen Chan, Chun-Yuan Wu | 2013-07-02 |
| 8404591 | Method of fabricating complementary metal-oxide-semiconductor (CMOS) device | Chiu-Hsien Yeh, Chin-Cheng Chien, Lien-Fa Hung, Yun-Cheng Kao | 2013-03-26 |
| 8329597 | Semiconductor process having dielectric layer including metal oxide and MOS transistor process | Shih-Fang Tzou, Chen-Kuo Chiang | 2012-12-11 |
| 8324059 | Method of fabricating a semiconductor structure | Ted Ming-Lang Guo, Chin-Cheng Chien, Shu-Yen Chan, Chun-Yuan Wu | 2012-12-04 |
| 8298950 | Method of etching sacrificial layer | Yeng-Peng Wang, Chiu-Hsien Yeh | 2012-10-30 |
| 8252515 | Method for removing photoresist | Chin-Cheng Chien, Chiu-Hsien Yeh, Che-Hua Hsu, Zhi-Cheng Lee, Shao-Hua Hsu +3 more | 2012-08-28 |
| 8211801 | Method of fabricating complementary metal-oxide-semiconductor (CMOS) device | Chiu-Hsien Yeh, Chin-Cheng Chien, Lien-Fa Hung, Yun-Cheng Kao | 2012-07-03 |
| 8058733 | Self-aligned contact set | — | 2011-11-15 |
| 7772064 | Method of fabricating self-aligned contact | — | 2010-08-10 |
| 7253094 | Methods for cleaning contact openings to reduce contact resistance | Jie Zhang, Vinay Krishna | 2007-08-07 |
| 7112834 | Gate etch process | Benjamin Schwarz, Kiyoko Ikeuchi, Peter Keswick, Lien Lee | 2006-09-26 |
| 7078334 | In situ hard mask approach for self-aligned contact etch | Saurabh Dutta Chowdhury, Mehran Sedigh, Prabhu Goplana | 2006-07-18 |
| 6977217 | Aluminum-filled via structure with barrier layer | Mira Ben-Tzur, Gorley Lau, Ivan Petrov Ivanov, FENG-YUEN DAI | 2005-12-20 |
| 6890859 | Methods of forming semiconductor structures having reduced defects, and articles and devices formed thereby | Hanna Bamnolker, Saurabu Dutta Chowdhury, Krishnaswamy Ramkumar | 2005-05-10 |
| 6699795 | Gate etch process | Benjamin Schwarz, Kiyoko Ikeuchi, Peter Keswick, Lien Lee | 2004-03-02 |
| 6635565 | Method of cleaning a dual damascene structure | Chih-Ning Wu, Sun-Chieh Chien | 2003-10-21 |
| 6554002 | Method for removing etching residues | Chih-Ning Wu, Cheng-Yuan Tsai | 2003-04-29 |