Issued Patents All Time
Showing 51–75 of 94 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7913058 | System and method for identifying TLB entries associated with a physical address of a specified range | Alexander Klaiber, H. Peter Anvin, David Dunn | 2011-03-22 |
| 7904891 | Checking for instruction invariance to execute previously obtained translation code by comparing instruction to a copy stored when write operation to the memory portion occur | John Banning, H. Peter Anvin, Robert Bedichek, Andrew Shaw, Linus Torvalds +1 more | 2011-03-08 |
| 7904789 | Techniques for detecting and correcting errors in a memory device | — | 2011-03-08 |
| 7873793 | Supporting speculative modification in a data cache | Alexander Klaiber, David Dunn, Paul Serris, Lacky V. Shah | 2011-01-18 |
| 7840788 | Checking for exception by floating point instruction reordered across branch by comparing current status in FP status register against last status copied in shadow register | David Dunn, Robert F. Cmelik | 2010-11-23 |
| 7793347 | Method and system for validating a computer system | — | 2010-09-07 |
| 7747896 | Dual ported replicated data cache | Alex Klaiber, Robert P. Masleid | 2010-06-29 |
| 7734892 | Memory protection and address translation hardware support for virtual machines | Nathan Isaac Laredo | 2010-06-08 |
| 7725656 | Braided set associative caching techniques | Alexander Klaiber, Robert P. Masleid, John Banning, James Van Zoeren, Paul Serris | 2010-05-25 |
| 7724027 | Method and system for elastic signal pipelining | Robert P. Masleid | 2010-05-25 |
| 7725677 | Method and apparatus for improving segmented memory addressing | H. Peter Anvin, Alex Klaiber, Parag Gupta | 2010-05-25 |
| 7696797 | Signal generator with output frequency greater than the oscillator frequency | William N. Schnaitter | 2010-04-13 |
| 7646835 | Method and system for automatically calibrating intra-cycle timing relationships for sampling signals for an integrated circuit device | — | 2010-01-12 |
| 7636815 | System and method for handling direct memory accesses | Alexander Klaiber, David Dunn | 2009-12-22 |
| 7634635 | Systems and methods for reordering processor instructions | Brian Holscher, James van Zoeren, David Dunn | 2009-12-15 |
| 7620779 | System and method for handling direct memory accesses | Alexander Klaiber, David Dunn | 2009-11-17 |
| 7606979 | Method and system for conservatively managing store capacity available to a processor issuing stores | Alexander Klaiber, David Dunn, Paul Serris, Lacky V. Shah | 2009-10-20 |
| 7606997 | Method and system for using one or more address bits and an instruction to increase an instruction set | Alexander Klaiber, Eric Hao | 2009-10-20 |
| 7478226 | Processing bypass directory tracking system and method | Alexander Klaiber | 2009-01-13 |
| 7404181 | Switching to original code comparison of modifiable code for translated code validity when frequency of detecting memory overwrites exceeds threshold | John Banning, H. Peter Anvin, Robert Bedichek, Andrew Shaw, Linus Torvalds +1 more | 2008-07-22 |
| 7380096 | System and method for identifying TLB entries associated with a physical address of a specified range | Alexander Klaiber, H. Peter Anvin, David Dunn | 2008-05-27 |
| 7380098 | Method and system for caching attribute data for matching attributes with physical addresses | H. Peter Anvin, Alexander Klaiber, John Banning | 2008-05-27 |
| 7376798 | Memory management methods and systems that support cache consistency | — | 2008-05-20 |
| 7337307 | Exception handling with inserted status check command accommodating floating point instruction forward move across branch | David Dunn, Robert F. Cmelik | 2008-02-26 |
| 7337439 | Method for increasing the speed of speculative execution | Richard P. Johnson | 2008-02-26 |