Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10146545 | Translation address cache for a microprocessor | Ross Segelken, Nathan Tuck, David Dunn | 2018-12-04 |
| 9875214 | Apparatus and method for transferring a plurality of data structures between memory and a plurality of vector registers | Mbou Eyole, Nigel John Stephens, Jeffry E. Gonion, Charles E. Tucker | 2018-01-23 |
| 8656214 | Dual ported replicated data cache | Guillermo J. Rozas, Robert P. Masleid | 2014-02-18 |
| 8522253 | Hardware support for virtual machine and operating system context switching in translation lookaside buffers and virtually tagged caches | Guillermo J. Rozas | 2013-08-27 |
| 7747896 | Dual ported replicated data cache | Guillermo J. Rozas, Robert P. Masleid | 2010-06-29 |
| 7725677 | Method and apparatus for improving segmented memory addressing | H. Peter Anvin, Guillermo J. Rozas, Parag Gupta | 2010-05-25 |
| 7334109 | Method and apparatus for improving segmented memory addressing | H. Peter Anvin, Guillermo J. Rozas, Parag Gupta | 2008-02-19 |
| 6851040 | Method and apparatus for improving segmented memory addressing | H. Peter Anvin, Guillermo J. Rozas, Parag Gupta | 2005-02-01 |
| 6725361 | Method and apparatus for emulating a floating point stack in a translation process | Guillermo J. Rozas, David Dunn, David Dobrikin, Daniel H. Nelsen | 2004-04-20 |
| 6668287 | Software direct memory access | Patrick E. Boyle, David Keppel, Edmund J. Kelly | 2003-12-23 |
| 6363336 | Fine grain translation discrimination | John Banning, H. Peter Anvin, Benjamin Iver Gribstad, David Keppel, Paul Serris | 2002-03-26 |
| 5905855 | Method and apparatus for correcting errors in computer systems | Robert Bedichek, David Keppel | 1999-05-18 |