ST

Shigeru Tahara

TL Tokyo Electron Limited: 37 patents #85 of 5,567Top 2%
UD Universite D'Orleans: 3 patents #2 of 132Top 2%
IM Imec: 2 patents #184 of 687Top 30%
KT Kabushiki Kaisha Toshiba: 2 patents #9,982 of 21,451Top 50%
KC Kuretake Co.: 1 patents #12 of 23Top 55%
📍 Rifu, JP: #72 of 2,101 inventorsTop 4%
Overall (All Time): #84,414 of 4,157,543Top 3%
38
Patents All Time

Issued Patents All Time

Showing 26–38 of 38 patents

Patent #TitleCo-InventorsDate
8524101 Method and apparatus for manufacturing semiconductor device, and storage medium Yuki Chiba 2013-09-03
8492287 Substrate processing method 2013-07-23
8404596 Plasma ashing method Naotsugu Hoshi 2013-03-26
8361275 Etching apparatus Masaru Nishino 2013-01-29
8349085 Substrate processing apparatus Seiichi Takayama, Morihiro Takanashi 2013-01-08
8282984 Processing condition inspection and optimization method of damage recovery process, damage recovering system and storage medium Reiko SASAHARA, Jun Tamura 2012-10-09
8101507 Semiconductor device manufacturing method and semiconductor device manufacturing apparatus Ryuichi Asako, Gousuke Shiraishi 2012-01-24
8026150 Semiconductor device manufacturing method and storage medium Reiko SASAHARA, Jun Tamura 2011-09-27
7964511 Plasma ashing method Naotsugu Hoshi 2011-06-21
7892986 Ashing method and apparatus therefor Eiichi Nishimura, Kumiko Yamazaki 2011-02-22
7882800 Ring mechanism, and plasma processing device using the ring mechanism Akira Koshiishi, Mitsuru Hashimoto, Hideaki Tanaka, Kunihiko Hinata, Jun Ooyabu 2011-02-08
7674393 Etching method and apparatus Masaru Nishino 2010-03-09
D470885 Marking pen 2003-02-25