Issued Patents All Time
Showing 26–50 of 69 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7678675 | Structure and method for a triple-gate transistor with reverse STI | Mark Visokay | 2010-03-16 |
| 7642146 | Semiconductor CMOS devices and methods with NMOS high-k dielectric present in core region that mitigate damage to dielectric materials | Mark Visokay, Luigi Colombo | 2010-01-05 |
| 7625807 | Methods and systems to mitigate etch stop clipping for shallow trench isolation fabrication | Manuel Quevedo-Lopez, Leif C. Olsen | 2009-12-01 |
| 7612422 | Structure for dual work function metal gate electrodes by control of interface dipoles | Luigi Colombo, Mark Visokay | 2009-11-03 |
| 7601577 | Work function control of metals | Mark Visokay, Luigi Colombo, Antonio Luis Pacheco Rotondaro | 2009-10-13 |
| 7601578 | Defect control in gate dielectrics | Luigi Colombo, Mark Visokay, Antonio Luis Pacheco Rotondaro | 2009-10-13 |
| 7560792 | Reliable high voltage gate dielectric layers using a dual nitridation process | Rajesh Khamankar, Douglas T. Grider, Hiroaki Niimi, April Gurba, Toan Tran | 2009-07-14 |
| 7528024 | Dual work function metal gate integration in semiconductor devices | Luigi Colombo, Mark Visokay | 2009-05-05 |
| 7489009 | Multiple-gate MOSFET device with lithography independent silicon body thickness | — | 2009-02-10 |
| 7470577 | Dual work function CMOS devices utilizing carbide based electrodes | Luigi Colombo, Mark Visokay | 2008-12-30 |
| 7387956 | Refractory metal-based electrodes for work function setting in semiconductor devices | Luigi Colombo, Mark Visokay | 2008-06-17 |
| 7351626 | Method for controlling defects in gate dielectrics | Luigi Colombo, Mark Visokay, Antonio Luis Pacheco Rotondaro | 2008-04-01 |
| 7351632 | Semiconductor CMOS devices and methods with NMOS high-k dielectric formed prior to core PMOS silicon oxynitride dielectric formation using direct nitridation of silicon | Mark Visokay, Luigi Colombo | 2008-04-01 |
| 7321154 | Refractory metal-based electrodes for work function setting in semiconductor devices | Luigi Colombo, Mark Visokay | 2008-01-22 |
| 7291527 | Work function control of metals | Mark Visokay, Luigi Colombo, Antonio Luis Pacheco Rotondaro | 2007-11-06 |
| 7229873 | Process for manufacturing dual work function metal gates in a microelectronics device | Luigi Colombo, Mark Visokay | 2007-06-12 |
| 7226830 | Semiconductor CMOS devices and methods with NMOS high-k dielectric formed prior to core PMOS dielectric formation | Luigi Colombo, Mark Visokay | 2007-06-05 |
| 7199021 | Methods and systems to mitigate etch stop clipping for shallow trench isolation fabrication | Manuel Quevedo-Lopez, Leif C. Olsen | 2007-04-03 |
| 7183165 | Reliable high voltage gate dielectric layers using a dual nitridation process | Rajesh Khamankar, Douglas T. Grider, Hiroaki Niimi, April Gurba, Toan Tran | 2007-02-27 |
| 7176076 | Semiconductor CMOS devices and methods with NMOS high-k dielectric present in core region that mitigate damage to dielectric materials | Mark Visokay, Luigi Colombo | 2007-02-13 |
| 7135361 | Method for fabricating transistor gate structures and gate dielectrics thereof | Mark Visokay, Luigi Colombo, Antonio Luis Pacheco Rotondaro, Haowen Bu | 2006-11-14 |
| 7119386 | Versatile system for triple-gated transistors with engineered corners | Mark Visokay | 2006-10-10 |
| 7115530 | Top surface roughness reduction of high-k dielectric materials using plasma based processes | Manuel Quevedo-Lopez, Luigi Colombo, Mark Visokay | 2006-10-03 |
| 7098516 | Refractory metal-based electrodes for work function setting in semiconductor devices | Luigi Colombo, Mark Visokay | 2006-08-29 |
| 7071519 | Control of high-k gate dielectric film composition profile for property optimization | Luigi Colombo, Mark Visokay, Antonio Luis Pacheco Rotondaro | 2006-07-04 |