Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12432986 | Spacer structures for semiconductor devices | Cheng-Yi Peng | 2025-09-30 |
| 12426322 | Core-shell nanostructures for semiconductor devices | Cheng-Yi Peng | 2025-09-23 |
| 12040381 | Method of manufacturing semiconductor devices and semiconductor devices | Cheng-Yi Peng, Wen-Yuan Chen, Wen-Hsing Hsieh, Yi-Ju Hsu, Jon-Hsu Ho +1 more | 2024-07-16 |
| 11990510 | Semiconductor device and manufacturing method thereof | Cheng-Yi Peng, Ting TSAI, Chung-Wei HUNG, Jung-Ting Chen, Ying-Hua LAI +1 more | 2024-05-21 |
| 11961762 | Package component with stepped passivation layer | Ming-Da Cheng, Tzy-Kuang Lee, Wen-Hsiung Lu, Po-Hao Tsai, Wen-Che Chang | 2024-04-16 |
| 11929422 | Passivation layers for semiconductor devices | Cheng-Yi Peng, Ching-Hua Lee | 2024-03-12 |
| 11881530 | Spacer structures for semiconductor devices | Cheng-Yi Peng | 2024-01-23 |
| 11824089 | Core-shell nanostructures for semiconductor devices | Cheng-Yi Peng | 2023-11-21 |
| 11695055 | Passivation layers for semiconductor devices | Cheng-Yi Peng, Ching-Hua Lee | 2023-07-04 |
| 11621343 | Method of manufacturing semiconductor devices and semiconductor devices | Cheng-Yi Peng, Wen-Yuan Chen, Wen-Hsing Hsieh, Yi-Ju Hsu, Jon-Hsu Ho +1 more | 2023-04-04 |
| 11450567 | Package component with stepped passivation layer | Ming-Da Cheng, Tzy-Kuang Lee, Wen-Hsiung Lu, Po-Hao Tsai, Wen-Che Chang | 2022-09-20 |
| 11233119 | Core-shell nanostructures for semiconductor devices | Cheng-Yi Peng | 2022-01-25 |
| 11233149 | Spacer structures for semiconductor devices | Cheng-Yi Peng | 2022-01-25 |
| 11101360 | Method of manufacturing a semiconductor device and a semiconductor device | Cheng-Yi Peng, Wen-Hsing Hsieh, Wen-Yuan Chen, Jon-Hsu Ho, Bor-Zen Tien | 2021-08-24 |
| 11075269 | Semiconductor device and manufacturing method thereof | Cheng-Yi Peng, Ting TSAI, Chung-Wei HUNG, Jung-Ting Chen, Ying-Hua LAI +1 more | 2021-07-27 |
| 11069791 | Method of manufacturing semiconductor devices and semiconductor devices | Cheng-Yi Peng, Wen-Yuan Chen, Wen-Hsing Hsieh, Yi-Ju Hsu, Jon-Hsu Ho +1 more | 2021-07-20 |
| 9666483 | Integrated circuit having thinner gate dielectric and method of making | Chih-Hung Lu, Ching-Kun Huang, Ching-Chen Hao | 2017-05-30 |
| 9443721 | Wafer back side processing structure and apparatus | Cheng-Chien Li, Wei-Chih Lin, Ching-Kun Huang | 2016-09-13 |
| 9406559 | Semiconductor structure and method for forming the same | Han-Wei Yang, Chen-Chung Lai | 2016-08-02 |
| 9122828 | Apparatus and method for designing an integrated circuit layout having a plurality of cell technologies | Tsung-Yu Chiang, Kuang-Hsin Chen, Bor-Zen Tien, Tzong-Sheng Chang | 2015-09-01 |
| 9123673 | Wafer back side processing structure and apparatus | Cheng-Chien Li, Wei-Chih Lin, Ching-Kun Huang | 2015-09-01 |
| 9009639 | Method and system for enhanced integrated circuit layout | Wei-Chiang Hung | 2015-04-14 |
| 8890293 | Guard ring for through vias | Chih-Hung Lu, Ching-Chen Hao | 2014-11-18 |
| 7825024 | Method of forming through-silicon vias | Chuan-Yi Lin, Ching-Kun Huang, Sheng Lin | 2010-11-02 |