Issued Patents All Time
Showing 26–50 of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11227872 | FeRAM MFM structure with selective electrode etch | Chih-Hsiang Chang, Kuo-Chi Tu, Wen-Ting Chu, Tzu-Yu Chen, Fu-Chen Chang | 2022-01-18 |
| 11201281 | Method for forming a flat bottom electrode via (BEVA) top surface for memory | Hsia-Wei Chen, Chih-Yang Chang, Chin-Chieh Yang, Jen-Sheng Yang, Tung-Sheng Hsiao +3 more | 2021-12-14 |
| 11195840 | Method and structures pertaining to improved ferroelectric random-access memory (FeRAM) | Tzu-Yu Chen, Kuo-Chi Tu, Wen-Ting Chu, Yong-Shiuan Tsair | 2021-12-07 |
| 11183503 | Memory cell having top and bottom electrodes defining recesses | Tzu-Yu Chen, Kuo-Chi Tu, Wen-Ting Chu, Chih-Hsiang Chang, Fu-Chen Chang | 2021-11-23 |
| 11017852 | Method of forming memory device | Kuo-Chi Tu, Chu-Jie Huang, Nai-Chao Su, Wen-Ting Chu | 2021-05-25 |
| 11011224 | Memory device and method for forming the same | Kuo-Chi Tu, Chu-Jie Huang, Nai-Chao Su, Wen-Ting Chu | 2021-05-18 |
| 11004975 | Semiconductor device and manufacturing method thereof | Kuo-Chi Tu, Jen-Sheng Yang, Tong-Chern Ong, Wen-Ting Chu | 2021-05-11 |
| 10868250 | Resistance variable memory structure and method of forming the same | Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang, Wen-Chun You +2 more | 2020-12-15 |
| 10862029 | Top electrode for device structures in interconnect | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chih-Yang Chang, Chin-Chieh Yang +2 more | 2020-12-08 |
| 10796759 | Method and apparatus for reading RRAM cell | Chin-Chieh Yang, Chih-Yang Chang, Chang-Sheng Liao, Hsia-Wei Chen, Jen-Sheng Yang +4 more | 2020-10-06 |
| 10763426 | Method for forming a flat bottom electrode via (BEVA) top surface for memory | Hsia-Wei Chen, Chih-Yang Chang, Chin-Chieh Yang, Jen-Sheng Yang, Tung-Sheng Hsiao +3 more | 2020-09-01 |
| 10727337 | Semiconductor device and manufacturing method thereof | Kuo-Chi Tu, Jen-Sheng Yang, Tong-Chern Ong, Wen-Ting Chu | 2020-07-28 |
| 10700275 | RRAM cell structure with laterally offset BEVA/TEVA | Chih-Yang Chang, Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Hsia-Wei Chen +2 more | 2020-06-30 |
| 10566519 | Method for forming a flat bottom electrode via (BEVA) top surface for memory | Hsia-Wei Chen, Chih-Yang Chang, Chin-Chieh Yang, Jen-Sheng Yang, Tung-Sheng Hsiao +3 more | 2020-02-18 |
| 10510953 | Top electrode for device structures in interconnect | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chih-Yang Chang, Chin-Chieh Yang +2 more | 2019-12-17 |
| 10497436 | Memory device and fabrication thereof | Kuo-Chi Tu, Chu-Jie Huang, Nai-Chao Su, Wen-Ting Chu | 2019-12-03 |
| 10388868 | Resistance variable memory structure and method of forming the same | Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang, Wen-Chun You +2 more | 2019-08-20 |
| 10311952 | Method and apparatus for reading RRAM cell | Chin-Chieh Yang, Chih-Yang Chang, Chang-Sheng Liao, Hsia-Wei Chen, Jen-Sheng Yang +4 more | 2019-06-04 |
| 10276790 | Top electrode for device structures in interconnect | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chih-Yang Chang, Chin-Chieh Yang +2 more | 2019-04-30 |
| 10249756 | Semiconductor device including memory and logic circuit having FETs with ferroelectric layer and manufacturing methods thereof | Kuo-Chi Tu, Jen-Sheng Yang, Tong-Chern Ong, Wen-Ting Chu | 2019-04-02 |
| 10199575 | RRAM cell structure with laterally offset BEVA/TEVA | Chih-Yang Chang, Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Hsia-Wei Chen +2 more | 2019-02-05 |
| 10164185 | RRAM cell with PMOS access transistor | Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang, Jen-Sheng Yang +2 more | 2018-12-25 |
| 10158072 | Step height reduction of memory element | Jen-Sheng Yang, Wen-Ting Chu, Chih-Yang Chang, Chin-Chieh Yang, Kuo-Chi Tu +3 more | 2018-12-18 |
| 10008662 | Perpendicular magnetic tunneling junction (MTJ) for improved magnetoresistive random-access memory (MRAM) process | Wen-Chun You, Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang +2 more | 2018-06-26 |
| 9941470 | RRAM device with data storage layer having increased height | Jen-Sheng Yang, Chih-Yang Chang, Chin-Chieh Yang, Kuo-Chi Tu, Wen-Ting Chu +2 more | 2018-04-10 |