Issued Patents All Time
Showing 26–50 of 56 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11823896 | Conductive structure formed by cyclic chemical vapor deposition | Keng-Chu Lin, Shuen-Shin Liang, Sung-Li Wang, Yasutoshi Okuno, Yu-Yun Peng | 2023-11-21 |
| 11804539 | Transistor isolation structures | Keng-Chu Lin, Yu-Yun Peng | 2023-10-31 |
| 11798985 | Methods for manufacturing isolation layers in stacked transistor structures | Dhanyakumar Mahaveer Sathaiya, Huicheng Chang, Ko-Feng Chen, Keng-Chu Lin | 2023-10-24 |
| 11776960 | Gate structures for stacked semiconductor devices | Sathaiya Mahaveer DHANYAKUMAR, Huicheng Chang, Keng-Chu Lin | 2023-10-03 |
| 11776910 | Partial barrier free vias for cobalt-based interconnects and methods of fabrication thereof | Tsung-Ling Tsai, Shen-Nan Lee, Chung-Wei Hsu, Chen-Hao Wu, Teng-Chun Tsai | 2023-10-03 |
| 11756864 | Contact plugs for semiconductor device | Yasutoshi Okuno, Sung-Li Wang, Pang-Yen Tsai, Shen-Nan Lee, Teng-Chun Tsai | 2023-09-12 |
| 11749682 | Selective dual silicide formation using a maskless fabrication process flow | Pang-Yen Tsai, Yasutoshi Okuno | 2023-09-05 |
| 11715763 | Method of forming metal contact for semiconductor device | Sung-Li Wang, Yasutoshi Okuno | 2023-08-01 |
| 11488869 | Transistor isolation structures | Keng-Chu Lin, Yu-Yun Peng | 2022-11-01 |
| 11476333 | Dual channel structure | Dhanyakumar Mahaveer Sathaiya, Keng-Chu Lin, Tzer-Min Shen | 2022-10-18 |
| 11476365 | Fin field effect transistor device structure and method for forming the same | Chia-Hung Chu, Sung-Li Wang, Fang-Wei Lee, Jung-Hao Chang, Keng-Chu Lin | 2022-10-18 |
| 11450666 | Semiconductor devices including two-dimensional material and methods of fabrication thereof | Dhanyakumar Mahaveer Sathaiya | 2022-09-20 |
| 11404416 | Low resistance fill metal layer material as stressor in metal gates | Ziwei Fang, Keng-Chu Lin, Hsueh Wen Tsau | 2022-08-02 |
| 11380781 | Contact and via structures for semiconductor devices | Keng-Chu Lin | 2022-07-05 |
| 11362212 | Contact interface engineering for reducing contact resistance | Keng-Chu Lin, Sung-Li Wang | 2022-06-14 |
| 11227794 | Method for making self-aligned barrier for metal vias In-Situ during a metal halide pre-clean and associated interconnect structure | Sung-Li Wang, Shuen-Shin Liang, Yu-Yun Peng, Fang-Wei Lee, Chia-Hung Chu +1 more | 2022-01-18 |
| 11211465 | Semiconductor device having gate dielectric and inhibitor film over gate dielectric | Hsueh Wen Tsau, Chia-Ching Lee, Da-Yuan Lee, Hsiao-Kuan Wei, Chih-Chang Hung +2 more | 2021-12-28 |
| 11201232 | Semiconductor structure with metal containing layer | Sung-Li Wang, Yasutoshi Okuno | 2021-12-14 |
| 11158539 | Method and structure for barrier-less plug | Sung-Li Wang, Hung-Yi Huang, Yu-Yun Peng, Chia-Hung Chu, Shuen-Shin Liang +1 more | 2021-10-26 |
| 11018053 | Semiconductor structure with material modification and low resistance plug | Akira Mineji | 2021-05-25 |
| 11004794 | Partial barrier free vias for cobalt-based interconnects and methods of fabrication thereof | Tsung-Ling Tsai, Shen-Nan Lee, Chung-Wei Hsu, Chen-Hao Wu, Teng-Chun Tsai | 2021-05-11 |
| 10998241 | Selective dual silicide formation using a maskless fabrication process flow | Pang-Yen Tsai, Yasutoshi Okuno | 2021-05-04 |
| 10854716 | Semiconductor device with source/drain contact formed using bottom-up deposition | Sung-Li Wang, Yasutoshi Okuno | 2020-12-01 |
| 10847413 | Method of forming contact plugs for semiconductor device | Yasutoshi Okuno, Sung-Li Wang, Pang-Yen Tsai, Shen-Nan Lee, Teng-Chun Tsai | 2020-11-24 |
| 10797161 | Method for manufacturing semiconductor structure using selective forming process | Sung-Li Wang, Yasutoshi Okuno | 2020-10-06 |