Issued Patents All Time
Showing 351–375 of 417 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11038061 | Semiconductor device structure and method for forming the same | Kuo-Cheng Chiang, Shi Ning Ju, Ching-Wei Tsai, Chih-Hao Wang | 2021-06-15 |
| 11038058 | Semiconductor device structure and method for forming the same | Kuo-Cheng Chiang, Shi Ning Ju, Ching-Wei Tsai, Chih-Hao Wang | 2021-06-15 |
| 11031395 | Method of forming high performance MOSFETs having varying channel structures | Tetsu Ohtou, Ching-Wei Tsai, Jiun-Jia Huang, Chi-Hsing Hsu | 2021-06-08 |
| 11031418 | Integrated circuit structure and method with hybrid orientation for FinFET | Tzer-Min Shen, Zhiqiang Wu, Chung-Cheng Wu, Ching-Wei Tsai, Chih-Hao Wang +1 more | 2021-06-08 |
| 11031292 | Multi-gate device and related methods | Shi Ning Ju, Kuo-Cheng Chiang, Ching-Wei Tsai, Chih-Hao Wang | 2021-06-08 |
| 11031298 | Semiconductor device and method | Yi-Bo Liao, Kai-Chieh Yang, Ching-Wei Tsai | 2021-06-08 |
| 11018246 | Integrated circuit with a fin and gate structure and method making the same | Kuo-Cheng Chiang, Teng-Chun Tsai, Chih-Hao Wang | 2021-05-25 |
| 11004960 | Semiconductor device and manufacturing method thereof | Kuo-Cheng Ching, Shi Ning Ju, Kuan-Ting Pan, Chih-Hao Wang | 2021-05-11 |
| 10998238 | Integrated circuits with buried interconnect conductors | Kuo-Cheng Ching, Shi Ning Ju, Chih-Hao Wang | 2021-05-04 |
| 10985277 | Method for forming semiconductor device structure | Kuo-Cheng Ching, Kuan-Ting Pan, Chih-Hao Wang | 2021-04-20 |
| 10971609 | Back end of line nanowire power switch transistors | Li-Yang Chuang, Ching-Wei Tsai, Wang-Chun Huang | 2021-04-06 |
| 10971605 | Dummy dielectric fin design for parasitic capacitance reduction | Kuo-Cheng Ching, Chih-Hao Wang, Shi Ning Ju | 2021-04-06 |
| 10964816 | Method and device for boosting performance of FinFETs via strained spacer | Kai-Chieh Yang, Li-Yang Chuang, Pei-Yu Wang, Wei Ju Lee, Ching-Wei Tsai | 2021-03-30 |
| 10950714 | Semiconductor device and manufacturing method thereof | Kuo-Cheng Ching, Chih-Hao Wang, Keng-Chu Lin, Shi Ning Ju | 2021-03-16 |
| 10943830 | Self-aligned structure for semiconductor devices | Kuo-Cheng Chiang, Chih-Hao Wang, Shi Ning Ju, Kuan-Ting Pan | 2021-03-09 |
| 10937477 | Shared decoder circuit and method | XiuLi YANG, Ching-Wei Wu, He-Zhou WAN, Luping KONG | 2021-03-02 |
| 10937895 | Epitaxial features confined by dielectric fins and spacers | Kuo-Cheng Ching, Chih-Hao Wang | 2021-03-02 |
| 10930767 | Fin-like field effect transistor patterning methods for achieving fin width uniformity | Kuo-Cheng Ching, Shi Ning Ju, Chih-Hao Wang | 2021-02-23 |
| 10930794 | Self-aligned spacers for multi-gate devices and method of fabrication thereof | Kuo-Cheng Ching, Shi Ning Ju, Guan-Lin Chen, Chih-Hao Wang | 2021-02-23 |
| 10930569 | Dual crystal orientation for semiconductor devices | Kuo-Cheng Chiang, Chih-Hao Wang, Ching-Wei Tsai | 2021-02-23 |
| 10910375 | Semiconductor device and method of fabrication thereof | Kuo-Cheng Ching, Shi Ning Ju, Ching-Wei Tsai, Chih-Hao Wang | 2021-02-02 |
| 10886269 | Semiconductor device and manufacturing method thereof | Kuo-Cheng Ching, Kuan-Ting Pan, Shi Ning Ju, Chih-Hao Wang | 2021-01-05 |
| 10879379 | Multi-gate device and related methods | Cheng-Ting Chung, Ching-Wei Tsai | 2020-12-29 |
| 10879351 | Fill fins for semiconductor devices | Kuo-Cheng Ching, Chih-Hao Wang | 2020-12-29 |
| 10879242 | Method of manufacturing semiconductor device on hybrid substrate | Kuo-Cheng Ching, Ching-Wei Tsai, Chih-Hao Wang | 2020-12-29 |