Issued Patents All Time
Showing 376–400 of 417 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10879238 | Negative capacitance finFET and method of fabricating thereof | Kuo-Cheng Ching, Chih-Hao Wang, Sai-Hooi Yeong, Tzer-Min Shen, Chi-Hsing Hsu | 2020-12-29 |
| 10872818 | Buried power rail and method forming same | Kuo-Cheng Chiang, Shi Ning Ju, Chih-Hao Wang | 2020-12-22 |
| 10868015 | Hybrid scheme for improved performance for P-type and N-type FinFETs | Kuo-Cheng Chiang, Shi Ning Ju, Ching-Wei Tsai, Chih-Hao Wang | 2020-12-15 |
| 10868182 | Field effect transistor and manufacturing method thereof | Yu-Xuan Huang, Ching-Wei Tsai | 2020-12-15 |
| 10868014 | Hybrid scheme for improved performance for P-type and N-type FinFETs | Kuo-Cheng Chiang, Shi Ning Ju, Ching-Wei Tsai, Chih-Hao Wang | 2020-12-15 |
| 10861973 | Negative capacitance transistor with a diffusion blocking layer | Chi-Hsing Hsu, Ching-Wei Tsai, Chih-Hao Wang, Sai-Hooi Yeong | 2020-12-08 |
| 10861958 | Integrated circuits with gate stacks | Li-Shyue Lai, Ching-Wei Tsai, Kai-Chieh Yang | 2020-12-08 |
| 10861952 | Methods of manufacturing gate-all-around (GAA) FETs through partial replacement of gate spacers | Kuo-Cheng Ching, Ching-Wei Tsai, Chih-Hao Wang | 2020-12-08 |
| 10847513 | Buried interconnect conductor | Kuo-Cheng Ching, Shi Ning Ju, Kuan-Ting Pan, Chih-Hao Wang | 2020-11-24 |
| 10833167 | Fin field effect transistor (finFET) device structure and method for forming the same | Sai-Hooi Yeong, Chi On Chui, Bo-Feng Young, Bo-Yu Lai, Chih-Hao Wang | 2020-11-10 |
| 10811317 | Method for manufacturing nanostructure with various widths | Kuo-Cheng Ching, Shi Ning Ju, Chih-Hao Wang | 2020-10-20 |
| 10755983 | Fin isolation structures of semiconductor devices | Kuo-Cheng Chiang, Chih-Hao Wang, Yen-Ming Chen | 2020-08-25 |
| 10741672 | Gate structure for semiconductor device | Kuo-Cheng Ching, Chih-Hao Wang, Ching-Wei Tsai | 2020-08-11 |
| 10720503 | Method for manufacturing semiconductor device | Kuo-Cheng Ching, Shi Ning Ju, Chih-Hao Wang | 2020-07-21 |
| 10714394 | Fin isolation structures of semiconductor devices | Kuo-Cheng Ching, Chih-Hao Wang, Yen-Ming Chen | 2020-07-14 |
| 10672892 | Self-aligned epitaxy layer | Kuo-Cheng Ching, Chih-Hao Wang | 2020-06-02 |
| 10658362 | Semiconductor component and fabricating method thereof | Kuo-Cheng Ching, Ching-Wei Tsai, Chih-Hao Wang | 2020-05-19 |
| 10658490 | Structure and formation method of isolation feature of semiconductor device structure | Kuo-Cheng Ching, Shi Ning Ju, Kuan-Ting Pan, Chih-Hao Wang | 2020-05-19 |
| 10658370 | Semiconductor device and manufacturing method thereof | Tetsu Ohtou, Ching-Wei Tsai, Yasutoshi Okuno, Jiun-Jia Huang | 2020-05-19 |
| 10636910 | Semiconductor device structure and method of forming the same | Kuo-Cheng Ching, Kuan-Ting Pan, Chih-Hao Wang | 2020-04-28 |
| 10535680 | Integrated circuit structure and method with hybrid orientation for FinFET | Tzer-Min Shen, Zhiqiang Wu, Chung-Cheng Wu, Ching-Wei Tsai, Chih-Hao Wang +1 more | 2020-01-14 |
| 10535656 | Hybrid scheme for improved performance for P-type and N-type FinFETs | Kuo-Cheng Chiang, Shi Ning Ju, Ching-Wei Tsai, Chih-Hao Wang | 2020-01-14 |
| 10529833 | Integrated circuit with a fin and gate structure and method making the same | Kuo-Cheng Ching, Teng-Chun Tsai, Chih-Hao Wang | 2020-01-07 |
| 10510873 | Semiconductor device and manufacturing method thereof | Kuo-Cheng Ching, Shi Ning Ju, Kuan-Ting Pan, Chih-Hao Wang | 2019-12-17 |
| 10510874 | Semiconductor device | Kuo-Cheng Ching, Chih-Hao Wang, Keng-Chu Lin, Shi Ning Ju | 2019-12-17 |