Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12386383 | Memory structure with optimized latch clock design | Ming-Hung Chang, Jun Xie, Ching-Wei Wu | 2025-08-12 |
| 12362010 | Memory circuit and method of operating same | Chia-Cheng Chen, Ching-Wei Wu, Jun Xie | 2025-07-15 |
| 12183432 | Shared decoder circuit and method | XiuLi YANG, Ching-Wei Wu, He-Zhou WAN, Kuan-Lun Cheng | 2024-12-31 |
| 11705175 | Shared decoder circuit and method | XiuLi YANG, Ching-Wei Wu, He-Zhou WAN, Kuan-Lun Cheng | 2023-07-18 |
| 11450367 | Shared decoder circuit and method | XiuLi YANG, Ching-Wei Wu, He-Zhou WAN, Kuan-Lun Cheng | 2022-09-20 |
| 10937477 | Shared decoder circuit and method | XiuLi YANG, Ching-Wei Wu, He-Zhou WAN, Kuan-Lun Cheng | 2021-03-02 |