WL

Wei Ju Lee

TSMC: 23 patents #1,475 of 12,232Top 15%
Overall (All Time): #176,614 of 4,157,543Top 5%
23
Patents All Time

Issued Patents All Time

Showing 1–23 of 23 patents

Patent #TitleCo-InventorsDate
12349418 Semiconductor device and manufacturing method thereof Chun-Fu Cheng, Chung-Wei Wu, Zhiqiang Wu 2025-07-01
12300720 Multi-gate device with air gap spacer and fabrication methods thereof Pei-Yu Wang 2025-05-13
12211790 Conductive rail structure for semiconductor devices Yi-Bo Liao, Cheng-Ting Chung, Hou-Yu Chen, Chun-Fu Cheng, Kuan-Lun Cheng 2025-01-28
12199170 Method of manufacturing a multi-gate device having a semiconductor seed layer embedded in an isolation layer Chun-Fu Cheng, Chung-Wei Wu, Zhiqiang Wu 2025-01-14
12148830 Method and device for boosting performance of FinFETs via strained spacer Kai-Chieh Yang, Li-Yang Chuang, Pei-Yu Wang, Ching-Wei Tsai, Kuan-Lun Cheng 2024-11-19
12094938 Semiconductor device with low resistances and methods of forming such Yu-Xuan Huang, Wang-Chun Huang, Yi-Bo Liao, Cheng-Ting Chung, Hou-Yu Chen +1 more 2024-09-17
12009408 Multi-gate devices having a semiconductor layer between an inner spacer and an epitaxial feature Chun-Fu Cheng, Chung-Wei Wu, Zhiqiang Wu 2024-06-11
12009293 Barrier-free interconnect structure and manufacturing method thereof Pei-Yu Wang, Cheng-Ting Chung 2024-06-11
11929409 Semiconductor device with improved source and drain contact area and methods of fabrication thereof Chun-Fu Cheng, Chung-Wei Wu, Zhiqiang Wu 2024-03-12
11855143 Semiconductor structures and methods thereof Chun-Fu Cheng, Chung-Wei Wu, Zhiqiang Wu 2023-12-26
11837538 Conductive rail structure for semiconductor devices Yi-Bo Liao, Cheng-Ting Chung, Hou-Yu Chen, Chun-Fu Cheng, Kuan-Lun Cheng 2023-12-05
11764262 Multi-gate device with air gap spacer and fabrication methods thereof Pei-Yu Wang 2023-09-19
11756959 Structure and method of integrated circuit having decouple capacitance Ching-Wei Tsai, Yu-Xuan Huang, Kuan-Lun Cheng, Chun-Fu Cheng, Chung-Wei Wu 2023-09-12
11664451 Method and device for boosting performance of FinFETs via strained spacer Kai-Chieh Yang, Li-Yang Chuang, Pei-Yu Wang, Ching-Wei Tsai, Kuan-Lun Cheng 2023-05-30
11532627 Source/drain contact structure Yi-Bo Liao, Yu-Xuan Huang, Hou-Yu Chen, Chun-Fu Cheng 2022-12-20
11489063 Method of manufacturing a source/drain feature in a multi-gate semiconductor structure Chun-Fu Cheng, Chung-Wei Wu, Zhiqiang Wu 2022-11-01
11476342 Semiconductor device with improved source and drain contact area and methods of fabrication thereof Chun-Fu Cheng, Chung-Wei Wu, Zhiqiang Wu 2022-10-18
11469332 Semiconductor device and manufacturing method thereof Chun-Fu Cheng, Chung-Wei Wu, Zhiqiang Wu 2022-10-11
11309240 Conductive rail structure for semiconductor devices Yi-Bo Liao, Cheng-Ting Chung, Hou-Yu Chen, Chun-Fu Cheng, Kuan-Lun Cheng 2022-04-19
11276637 Barrier-free interconnect structure and manufacturing method thereof Pei-Yu Wang, Cheng-Ting Chung 2022-03-15
11177344 Multi-gate device with air gap spacer and fabrication methods thereof Pei-Yu Wang 2021-11-16
11037925 Structure and method of integrated circuit having decouple capacitance Ching-Wei Tsai, Yu-Xuan Huang, Kuan-Lun Cheng, Chun-Fu Cheng, Chung-Wei Wu 2021-06-15
10964816 Method and device for boosting performance of FinFETs via strained spacer Kai-Chieh Yang, Li-Yang Chuang, Pei-Yu Wang, Ching-Wei Tsai, Kuan-Lun Cheng 2021-03-30