Issued Patents All Time
Showing 26–34 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8826212 | Method of forming a layout including cells having different threshold voltages, a system of implementing and a layout formed | Sung-Yen Yeh, Yeh-Chi Chang, Yen-Pin Chen, Zhe-Wei Jiang, Yuan-Te Hou +1 more | 2014-09-02 |
| 8694945 | Automatic place and route method for electromigration tolerant power distribution | Chung-Hsing Wang, Huang-Yu Chen | 2014-04-08 |
| 8615725 | Methods for compact modeling of circuit stages for static timing analysis of integrated circuit designs | Igor Keller | 2013-12-24 |
| 8595669 | Flexible noise and delay modeling of circuit stages for static timing analysis of integrated circuit designs | Igor Keller, Vinod Kariat | 2013-11-26 |
| 8543954 | Concurrent noise and delay modeling of circuit stages for static timing analysis of integrated circuit designs | Igor Keller, Vinod Kariat | 2013-09-24 |
| 8533644 | Multi-CCC current source models and static timing analysis methods for integrated circuit designs | Vinod Kariat, Igor Keller, Joel R. Phillips | 2013-09-10 |
| 8516420 | Sensitivity and static timing analysis for integrated circuit designs using a multi-CCC current source model | Vinod Kariat, Igor Keller, Joel R. Phillips | 2013-08-20 |
| 8499274 | Computer implemented system and method for leakage calculation | Chien-Ju Chao, Jerry Chang Jui Kao, Chung-Hsing Wang, Huan Chi Tseng | 2013-07-30 |
| 8302046 | Compact modeling of circuit stages for static timing analysis of integrated circuit designs | Igor Keller | 2012-10-30 |