IK

Igor Keller

CS Cadence Design Systems: 41 patents #9 of 2,263Top 1%
Overall (All Time): #72,860 of 4,157,543Top 2%
42
Patents All Time

Issued Patents All Time

Showing 25 most recent of 42 patents

Patent #TitleCo-InventorsDate
12086529 Circuit design modification using timing-based yield calculation Eric Anderson, Yang Gao 2024-09-10
11775719 Cell instance charge model for delay calculation Xiaopeng Dong, Sourabh Rajguru 2023-10-03
11188696 Method, system, and product for deferred merge based method for graph based analysis pessimism reduction Amit Dhuria, Sri Harsha POTHUKUCHI, Pradeep Yadav, Pawan Kulshreshtha, Sharad Mehrotra +2 more 2021-11-30
11023636 Methods, systems, and computer program product for characterizing an electronic design with a susceptibility window Ratnakar Goyal, Manuj Verma, Harmandeep Singh 2021-06-01
11023640 Methods, systems, and computer program product for characterizing timing behavior of an electronic design with a derived current waveform Chirayu S. Amin, Omid Assare 2021-06-01
10963610 Analyzing clock jitter using delay calculation engine Vishnu Kumar 2021-03-30
10789406 Characterizing electronic component parameters including on-chip variations and moments Shiva Raja, Ling Wang 2020-09-29
10430536 Method and apparatus for yield calculation using statistical timing data that accounts for path and stage delay correlation Praveen Ghanta, Mikhail Chetin 2019-10-01
10275554 Delay propagation for multiple logic cells using correlation and coskewness of delays and slew rates in an integrated circuit design Mikhail Chetin, Praveen Ghanta 2019-04-30
10192012 Pseudo-inverter configuration for signal electromigration analysis Jalal Wehbeh, Aswin Ramakrishnan, Federico Politi, Ajish Thomas 2019-01-29
10185795 Systems and methods for statistical static timing analysis Praveen Ghanta, Arun Kumar Mishra 2019-01-22
10073934 Systems and methods for statistical static timing analysis Praveen Ghanta, Arun Kumar Mishra 2018-09-11
9928324 System and method for accurate modeling of back-miller effect in timing analysis of digital circuits William F Scott 2018-03-27
9881123 Method and system for timing analysis with adaptive timing window optimization for determining signal integrity impact Ratnakar Goyal, Manuj Verma, Arvind Nembili Veeravalli 2018-01-30
9710593 Methods, systems, and articles of manufacture for enhancing timing analyses with reduced timing libraries for electronic designs Mikhail Chetin, Xiaojun Sun 2017-07-18
9582626 Using waveform propagation for accurate delay calculation Eddy Pramono, Jijun Chen, Nikolay Rubanov 2017-02-28
9384310 View data sharing for efficient multi-mode multi-corner timing analysis Jijun Chen, Pradeep Yadav 2016-07-05
9129078 Static timing analysis of integrated circuit designs with flexible noise and delay models of circuit stages Vinod Kariat, King-Ho Tam 2015-09-08
9003342 Lumped aggressor model for signal integrity timing analysis Jijun Chen, Dhananjay Kumar Griyage 2015-04-07
8966421 Static timing analysis methods for integrated circuit designs using a multi-CCC current source model Vinod Kariat, Joel R. Phillips, King-Ho Tam 2015-02-24
8938703 Method and apparatus for comprehension of common path pessimism during timing model extraction Sneh Saurabh, Naresh Kumar 2015-01-20
8924905 Constructing equivalent waveform models for static timing analysis of integrated circuit designs Joel R. Philips, Jijun Chen 2014-12-30
8782583 Waveform based variational static timing analysis Saurabh Kumar Tiwary, Joel R. Phillips 2014-07-15
8726211 Generating an equivalent waveform model in static timing analysis Joel R. Phillips, Qunzeng Liu 2014-05-13
8631369 Methods, systems, and apparatus for timing and signal integrity analysis of integrated circuits with semiconductor process variations Vinod Kariat, Joel R. Phillips 2014-01-14