Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10318686 | Methods for reducing delay on integrated circuits by identifying candidate placement locations in a leveled graph | Shounak Dhar, Mahesh A. Iyer, Love Singhal, Saurabh Adya | 2019-06-11 |
| 9582626 | Using waveform propagation for accurate delay calculation | Igor Keller, Eddy Pramono, Jijun Chen | 2017-02-28 |
| 8151229 | System and method of computing pin criticalities under process variations for timing analysis and optimization | Hongliang Chang, Oleg Levitsky, Vassilios Gerousis | 2012-04-03 |