Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12406664 | Multimodal assistant understanding using on-screen and device context | Alkeshkumar M. Patel, Karan M. DARYANANI, Myra C. Lukens, Aswath Manoharan | 2025-09-02 |
| 12190873 | Determining whether speech input is intended for a digital assistant | Ahmed S. HUSSEN ABDELAZIZ, Alexander W. Churchill, Pranay Dighe, Sachin Kajarekar, Chaitanya Mannemala +6 more | 2025-01-07 |
| 12073831 | Using visual context to improve a virtual assistant | Sameer Badaskar, Akanksha Bindal, Ahmed S. HUSSEN ABDELAZIZ, Xiaochuan Niu, Alkeshkumar M. Patel +1 more | 2024-08-27 |
| 12027166 | Digital assistant reference resolution | Hong Yu, Shruti BHARGAVA, Myra C. Lukens, Jianpeng Cheng, Lin Li +3 more | 2024-07-02 |
| 10318686 | Methods for reducing delay on integrated circuits by identifying candidate placement locations in a leveled graph | Shounak Dhar, Mahesh A. Iyer, Love Singhal, Nikolay Rubanov | 2019-06-11 |
| 10303202 | Method and apparatus for performing clock allocation for a system implemented on a programmable device | Mahesh A. Iyer, Love Singhal | 2019-05-28 |
| 10242144 | Methods for minimizing logic overlap on integrated circuits | Mahesh A. Iyer, Love Singhal | 2019-03-26 |
| 10162924 | Method and apparatus for performing large scale consensus based clustering | Love Singhal, Mahesh A. Iyer | 2018-12-25 |
| 9922157 | Sector-based clock routing methods and apparatus | Carl Ebeling, Herman Schmit, Dana How, Mahesh A. Iyer | 2018-03-20 |
| 9280632 | Methods and apparatuses for circuit design and optimization | Kenneth S. McElvain, Gael Paul | 2016-03-08 |
| 8307315 | Methods and apparatuses for circuit design and optimization | Kenneth S. McElvain, Gael Paul | 2012-11-06 |