Issued Patents All Time
Showing 76–100 of 102 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8642417 | Method of manufacturing strained source/drain structures | Chun-Fai Cheng, Li-Ping Huang | 2014-02-04 |
| 8633070 | Lightly doped source/drain last method for dual-epi integration | Haiting Wang, Han-Ting Tsai | 2014-01-21 |
| 8502316 | Self-aligned two-step STI formation through dummy poly removal | Han-Ting Tsai, Chun-Fai Cheng, Haiting Wang, Wei-Yuan Lu, Hsien-Ching Lo | 2013-08-06 |
| 8482079 | Semiconductor device and method of manufacturing the same | Chun-Fai Cheng, Li-Ping Huang | 2013-07-09 |
| 8368147 | Strained semiconductor device with recessed channel | Chun-Fai Cheng, Han-Ting Tsai, Ming-Huan Tsai, Wei-Han Fan, Hsueh-Chang Sung +4 more | 2013-02-05 |
| 8362573 | Integrated circuits and manufacturing methods thereof | Chung-Cheng Wu, Ali Keshavarzi, Ta-Pen Guo, Jiann-Tyng Tzeng, Yen-Ming Chen +6 more | 2013-01-29 |
| 8338909 | Two-Step STI formation process | — | 2012-12-25 |
| 8324668 | Dummy structure for isolating devices in integrated circuits | Li-Ping Huang, Chih-Hsiang Huang, Chung-Cheng Wu, Haiting Wang | 2012-12-04 |
| 8236657 | Replacing symmetric transistors with asymmetric transistors | — | 2012-08-07 |
| 8153492 | Self-aligned V-channel MOSFET | — | 2012-04-10 |
| 8053344 | Methods of forming integrated circuits | Wei-Yuan Lu, Han-Ting Tsai | 2011-11-08 |
| 7960788 | Replacing symmetric transistors with asymmetric transistors | — | 2011-06-14 |
| 7888191 | Forming floating body RAM using bulk silicon substrate | Carlos H. Diaz | 2011-02-15 |
| 7842577 | Two-step STI formation process | — | 2010-11-30 |
| 7804130 | Self-aligned V-channel MOSFET | — | 2010-09-28 |
| 7649228 | Forming floating body RAM using bulk silicon substrate | Carlos H. Diaz | 2010-01-19 |
| 7545001 | Semiconductor device having high drive current and method of manufacture therefor | Shui-Ming Cheng, Kuan-Lun Cheng, Yi-Ming Sheu | 2009-06-09 |
| 7453121 | Body contact formation in partially depleted silicon on insulator device | Shui-Ming Cheng, Yin-Pin Wang | 2008-11-18 |
| 7220630 | Method for selectively forming strained etch stop layers to improve FET charge carrier mobility | Kaun-Lun Cheng, Shui-Ming Cheng, Yu-Yuan Yao, Sun-Jay Chang | 2007-05-22 |
| 6960512 | Method for manufacturing a semiconductor device having an improved disposable spacer | Shui-Ming Cheng, Yin-Pin Wang, Kuan-Lun Cheng, Huan-Tsung Huang | 2005-11-01 |
| 6806584 | Semiconductor device structure including multiple fets having different spacer widths | Percy V. Gilbert | 2004-10-19 |
| 6774415 | Method and structure for ultra-thin film SOI isolation | — | 2004-08-10 |
| 6642579 | Method of reducing the extrinsic body resistance in a silicon-on-insulator body contacted MOSFET | — | 2003-11-04 |
| 6506649 | Method for forming notch gate having self-aligned raised source/drain structure | Atul Ajmera, Victor Ku, Dominic J. Schepis | 2003-01-14 |
| 6437377 | Low dielectric constant sidewall spacer using notch gate process | Atul Ajmera, Victor Ku, Dominic J. Schepis | 2002-08-20 |