Issued Patents All Time
Showing 51–63 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8283734 | Multi-threshold voltage device and method of making same | Chung-Yu Chiang, Shyh-Wei Wang | 2012-10-09 |
| 8278179 | LDD epitaxy for FinFETs | Che-Min Chu, Tsung-Hung Li, Chih-Hung Tseng, Yen-Chun Lin, Chung-Cheng Wu | 2012-10-02 |
| 8278196 | High surface dopant concentration semiconductor device and method of fabricating | Yu-Lien Huang, Mao-Rong Yeh, Chun Hsiung Tsai, Tsung-Hung Lee, Tsz-Mei Kwok | 2012-10-02 |
| 8143680 | Gated diode with non-planar source region | Ying-Shiou Lin, Shyh-Wei Wang, Li-Ping Huang, Ying-Keung Leung, Carlos H. Diaz | 2012-03-27 |
| 7994016 | Method for obtaining quality ultra-shallow doped regions and device having same | Chun Hsiung Tsai, Chun-Feng Nieh, Chien-Tai Chan | 2011-08-09 |
| 7795119 | Flash anneal for a PAI, NiSi process | Chia Ping Lo, Jerry Lai, Chii-Ming Wu, Mei-Yun Wang | 2010-09-14 |
| 7732877 | Gated diode with non-planar source region | Ying-Shiou Lin, Shyh-Wei Wang, Li-Ping Huang, Ying-Keung Leung, Carlos H. Diaz | 2010-06-08 |
| 7399679 | Narrow width effect improvement with photoresist plug process and STI corner ion implantation | Yi-Ming Sheu, Cheng-Ku Chen, Po-Ying Yeh, Shi-Shung Peng, Chung-Cheng Wu | 2008-07-15 |
| 7115974 | Silicon oxycarbide and silicon carbonitride based materials for MOS devices | Zhen-Cheng Wu, Hung Chun Tsai, Weng Chang, Shwang-Ming Cheng, Mong-Song Liang | 2006-10-03 |
| 7071515 | Narrow width effect improvement with photoresist plug process and STI corner ion implantation | Yi-Ming Sheu, Cheng-Ku Chen, Po-Ying Yeh, Shi-Shung Peng, Chung-Cheng Wu | 2006-07-04 |
| 7012014 | Recessed gate structure with reduced current leakage and overlap capacitance | Yi-Ming Sheu, Ying-Keung Leung | 2006-03-14 |
| 6673683 | Damascene gate electrode method for fabricating field effect transistor (FET) device with ion implanted lightly doped extension regions | Yi-Ming Sheu, Yi-Ling Chan, Wan-Yih Lien, Carlos H. Diaz | 2004-01-06 |
| 6670226 | Planarizing method for fabricating gate electrodes | Yo-Sheng Lin, Yi-Ming Sheu, Chi-Hsun Hsieh | 2003-12-30 |