Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10950557 | Stacked chip package structure and manufacturing method thereof | Li-Chih Fang, Ji-Cheng Lin, Chun-Te Lin, Chien-Wen Huang | 2021-03-16 |
| 10607860 | Package structure and chip structure | Chia-Wei Chiang, Li-Chih Fang, Ji-Cheng Lin, Chun-Te Lin | 2020-03-31 |
| 10276510 | Manufacturing method of package structure having conductive shield | Chia-Wei Chiang, Li-Chih Fang, Ji-Cheng Lin, Chun-Te Lin | 2019-04-30 |
| 10276575 | Multi-threshold voltage field effect transistor and manufacturing method thereof | Amey Mahadev Walke, Chi-Hsun Hsieh, Yu-Hsuan Kuo | 2019-04-30 |
| 9837416 | Multi-threshold voltage field effect transistor and manufacturing method thereof | Amey Mahadev Walke, Chi-Hsun Hsieh, Yu-Hsuan Kuo | 2017-12-05 |
| 9825010 | Stacked chip package structure and manufacturing method thereof | Li-Chih Fang, Ji-Cheng Lin, Chun-Te Lin, Chien-Wen Huang | 2017-11-21 |
| D775896 | Cup | — | 2017-01-10 |
| 8853834 | Leadframe-type semiconductor package having EMI shielding layer connected to ground | Wen-Jeng Fan, Ming-Yen Wu | 2014-10-07 |
| 8541870 | Semiconductor package utilizing tape to reinforce fixing of leads to die pad | Wen-Jeng Fan, Wei-Min Chen | 2013-09-24 |
| 8278179 | LDD epitaxy for FinFETs | Da-Wen Lin, Tsung-Hung Li, Chih-Hung Tseng, Yen-Chun Lin, Chung-Cheng Wu | 2012-10-02 |