CH

Chien-Chao Huang

TSMC: 50 patents #650 of 12,232Top 6%
UM United Microelectronics: 9 patents #637 of 4,560Top 15%
CC Cheng Mei Instrument Technology Co.: 1 patents #4 of 10Top 40%
NL National Applied Research Laboratories: 1 patents #194 of 506Top 40%
📍 Baoshan, TW: #20 of 3,661 inventorsTop 1%
Overall (All Time): #38,031 of 4,157,543Top 1%
61
Patents All Time

Issued Patents All Time

Showing 26–50 of 61 patents

Patent #TitleCo-InventorsDate
7504652 Phase change random access memory 2009-03-17
7465620 Transistor mobility improvement by adjusting stress in shallow trench isolation Chih-Hsin Ko, Chung-Hu Ke 2008-12-16
7462554 Method for forming semiconductor device with modified channel compressive stress Tone-Xuan Chung, Cheng-Chuan Huang, Fu-Liang Yang 2008-12-09
7452805 Aluminum based conductor for via fill and interconnect Chao-Hsiung Wang, Chenming Hu, Horng-Huei Tseng 2008-11-18
7444199 Method for preparing mask and wafer data files Hsin-Ying Lee, Chih-Chiang Tu 2008-10-28
7361541 Programming optical device Fu-Liang Yang 2008-04-22
7357838 Relaxed silicon germanium substrate with low defect density Chun-Chieh Lin, Yee-Chia Yeo, Chao-Hsiung Wang, Tien-Chih Chang, Chenming Hu +4 more 2008-04-15
7342289 Strained silicon MOS devices Chung-Hu Ge, Wen-Chin Lee, Chenming Hu, Carlos H. Diaz, Fu-Liang Yang 2008-03-11
7312136 Method of fabricating a wafer with strained channel layers for increased electron and hole mobility for improving device performance Yee-Chia Yeo, Kuo-Nan Yang, Chun-Chieh Lin, Chenming Hu 2007-12-25
7268024 Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors Yee-Chia Yeo, How-Yu Chen, Wen-Chin Lee, Fu-Liang Yang, Chenming Hu 2007-09-11
7265425 Semiconductor device employing an extension spacer and a method of forming the same Kuang-Hsin Chen, Tang-Xuan Zhong, Cheng-Kuo Wen, Di-Hong Lee 2007-09-04
7238564 Method of forming a shallow trench isolation structure Chih-Hsin Ko, Chung-Hu Ke 2007-07-03
7202122 Cobalt silicidation process for substrates with a silicon—germanium layer Yee-Chia Yeo, Chao-Hsiung Wang, Chun-Chieh Lin, Chenming Hu 2007-04-10
7190036 Transistor mobility improvement by adjusting stress in shallow trench isolation Chih-Hsin Ko, Chung-Hu Ke 2007-03-13
7183137 Method for dicing semiconductor wafers Hsin-Hui Lee, Chao-Hsiung Wang, Fu-Liang Yang, Chenming Hu 2007-02-27
7164189 Slim spacer device and manufacturing method Tone-Xuan Chung, Fu-Liang Yang 2007-01-16
7135372 Strained silicon device manufacturing method Cheng-Chuan Huang, Fu-Liang Yang 2006-11-14
7119440 Back end IC wiring with improved electro-migration resistance 2006-10-10
7053453 Substrate contact and method of forming the same Hsun-Chih Tsao, Fu-Liang Yang 2006-05-30
7029994 Strained channel on insulator device Chung-Hu Ge, Chao-Hsiung Wang, Wen-Chin Lee, Chenming Hu 2006-04-18
7022561 CMOS device Chao-Hsing Wang, Chung-Hu Ge, Chenming Hu 2006-04-04
6975006 Semiconductor device with modified channel compressive stress Tone-Xuan Chung, Cheng-Chuan Huang, Fu-Liang Yang 2005-12-13
6924181 Strained silicon layer semiconductor product employing strained insulator layer Chao-Hsiung Wang, Chung-Hu Ge, Wen-Chin Lee, Chen Ming Hu 2005-08-02
6900502 Strained channel on insulator device Chung-Hu Ge, Chao-Hsuing Wang, Wen-Chin Lee, Chenming Hu 2005-05-31
6878610 Relaxed silicon germanium substrate with low defect density Chun Chich Lin, Yee-Chia Yeo, Chao-Hsiung Wang, Tien-Chih Chang, Chenming Hu +4 more 2005-04-12