Issued Patents All Time
Showing 51–61 of 61 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6867433 | Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors | Yee-Chia Yeo, How-Yu Chen, Wen-Chin Lee, Fu-Liang Yang, Chenming Hu | 2005-03-15 |
| 6812116 | Method of fabricating a wafer with strained channel layers for increased electron and hole mobility for improving device performance | Yee-Chia Yeo, Kuo-Nan Yang, Chun-Chieh Lin, Chenming Hu | 2004-11-02 |
| 6420791 | Alignment mark design | Anseime Chen, Shih-Che Wang | 2002-07-16 |
| 6316303 | Method of fabricating a MOS transistor having SEG silicon | Tony Lin, Ming-Yin Hao | 2001-11-13 |
| 6254676 | Method for manufacturing metal oxide semiconductor transistor having raised source/drain | Gwo-Shii Yang, Michael W C Huang, Hsien-Ta Chung, Tri-Rung Yew | 2001-07-03 |
| 6255023 | Method of manufacturing binary phase shift mask | Michael W C Huang, Juan-Yuan Wu | 2001-07-03 |
| 6187480 | Alternating phase-shifting mask | — | 2001-02-13 |
| 6051345 | Method of producing phase shifting mask | — | 2000-04-18 |
| 5965303 | Method of fabricating a phase shift mask utilizing a defect repair machine | — | 1999-10-12 |
| 5932489 | Method for manufacturing phase-shifting mask | — | 1999-08-03 |
| 5853927 | Method of aligning a mask in photolithographic process | — | 1998-12-29 |