Issued Patents All Time
Showing 1–25 of 144 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12426295 | Rough buffer layer for group III-V devices on silicon | Kuei-Ming Chen, Chung-Yi Yu | 2025-09-23 |
| 12389633 | Source/drains in semiconductor devices and methods of forming thereof | Kuei-Ming Chen, Po-Chun Liu, Chung-Yi Yu | 2025-08-12 |
| 12334389 | Manufacturing method of semiconductor device | Kuei-Ming Chen, Po-Chun Liu, Chung-Yi Yu, Chia-Shiung Tsai | 2025-06-17 |
| 12327777 | Semiconductor package structure and manufacturing method thereof | Chun-Lin Lu, Shou-Zen Chang | 2025-06-10 |
| 12308230 | High electron mobility transistor (HEMT) having an indium-containing layer and method of manufacturing the same | Po-Chun Liu, Chung-Chieh Hsu, Chung-Yi Yu, Chen-Hao Chiang, Min-Chang Ching | 2025-05-20 |
| 12278139 | Manufacturing method of semiconductor device | Kuei-Ming Chen, Po-Chun Liu, Chung-Yi Yu, Chia-Shiung Tsai | 2025-04-15 |
| 12255232 | Gallium nitride drain structures and methods of forming the same | Kuei-Ming Chen, Yung-Chang Chang | 2025-03-18 |
| 11984486 | Method of implanting dopants into a group III-nitride structure and device formed | Han-Chin Chiu, Chung-Yi Yu, Chen-Hao Chiang | 2024-05-14 |
| 11955374 | Method for forming SOI substrate | Eugene Chen, Chia-Shiung Tsai | 2024-04-09 |
| 11923237 | Manufacturing method of semiconductor device | Kuei-Ming Chen, Po-Chun Liu, Chung-Yi Yu, Chia-Shiung Tsai | 2024-03-05 |
| 11901413 | Diffusion barrier layer for source and drain structures to increase transistor performance | Kuei-Ming Chen, Chung-Yi Yu | 2024-02-13 |
| 11862720 | Rough buffer layer for group III-V devices on silicon | Kuei-Ming Chen, Chung-Yi Yu | 2024-01-02 |
| 11837564 | Semiconductor bonding structure | Chun-Lin Lu, Shou-Zen Chang, Ying-Tsung Chu | 2023-12-05 |
| 11824099 | Source/drains in semiconductor devices and methods of forming thereof | Kuei-Ming Chen, Po-Chun Liu, Chung-Yi Yu | 2023-11-21 |
| 11721752 | Semiconductor device having doped seed layer and method of manufacturing the same | Po-Chun Liu, Chung-Yi Yu, Chia-Shiung Tsai, Ru-Liang Lee | 2023-08-08 |
| 11594606 | Method of implanting dopants into a group III-nitride structure and device formed | Han-Chin Chiu, Chung-Yi Yu, Chen-Hao Chiang | 2023-02-28 |
| 11594413 | Semiconductor structure having sets of III-V compound layers and method of forming | Po-Chun Liu, Chung-Yi Yu, Chia-Shiung Tsai | 2023-02-28 |
| 11551927 | High electron mobility transistor (HEMT) having an indium-containing layer and method of manufacturing the same | Po-Chun Liu, Chung-Chieh Hsu, Chung-Yi Yu, Chen-Hao Chiang, Min-Chang Ching | 2023-01-10 |
| 11522049 | Diffusion barrier layer for source and drain structures to increase transistor performance | Kuei-Ming Chen, Chung-Yi Yu | 2022-12-06 |
| 11522066 | Sidewall passivation for HEMT devices | Han-Chin Chiu, Cheng-Yuan Tsai, Fu-Wei Yao | 2022-12-06 |
| 11515408 | Rough buffer layer for group III-V devices on silicon | Kuei-Ming Chen, Chung-Yi Yu | 2022-11-29 |
| 11417520 | Semiconductor structure having sets of III-V compound layers and method of forming | Po-Chun Liu, Chung-Yi Yu, Chia-Shiung Tsai | 2022-08-16 |
| 11329148 | Semiconductor device having doped seed layer and method of manufacturing the same | Po-Chun Liu, Chung-Yi Yu, Chia-Shiung Tsai, Ru-Liang Lee | 2022-05-10 |
| 11127725 | Semiconductor structure and associated manufacturing method | Ping-Yin Liu, Yeong-Jyh Lin | 2021-09-21 |
| 10991819 | High electron mobility transistors | Po-Chun Liu, Chung-Yi Yu, Chen-Hao Chiang | 2021-04-27 |