Issued Patents All Time
Showing 26–50 of 92 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7763492 | Method of making phase change memory device employing thermally insulating voids and sloped trench | — | 2010-07-27 |
| 7701248 | Storage element for controlling a logic circuit, and a logic device having an array of such storage elements | Kai Man Yue, Geeng-Chuan Chern, Tsung-Lu Syu | 2010-04-20 |
| 7605092 | Passive elements, articles, packages, semiconductor composites, and methods of manufacturing same | Long Wang, Sychyi Fang | 2009-10-20 |
| 7598561 | NOR flash memory | Prateep Tuntasood, Der-Tsyr Fan | 2009-10-06 |
| 7547603 | Non-planar non-volatile memory cell with an erase gate, an array therefor, and a method of making same | Sohrab Kianian, Yaw Wen Hu | 2009-06-16 |
| 7470949 | Bidirectional nonvolatile memory cell having charge trapping layer in trench and an array of such memory cells, and method of manufacturing | Yuniarto Widjaja, Jack Edward Frayer, Felix (Ying-Kit) Tsui | 2008-12-30 |
| 7438822 | Apparatus and method for shielding a wafer from charged particles during plasma etching | Hongwen Yan, Brian L. Ji, Siddhartha Panda, Richard S. Wise | 2008-10-21 |
| 7439572 | Stacked gate memory cell with erase to gate, array, and method of manufacturing | Hieu Van Tran, Dana Lee, Jack Edward Frayer | 2008-10-21 |
| 7403418 | Word line voltage boosting circuit and a memory array incorporating same | Ya-Fen Lin, Elbert Lin, Hieu Van Tran, Jack Edward Frayer | 2008-07-22 |
| 7399678 | Method for reading an array of multi-bit ROM cells with each cell having bi-directional read | Dana Lee | 2008-07-15 |
| 7358559 | Bi-directional read/program non-volatile floating gate memory array, and method of formation | Felix (Ying-Kit) Tsui, Jeng-Wei Yang, Chun-Ming Chen, Dana Lee, Changyuan Chen | 2008-04-15 |
| 7351613 | Method of trimming semiconductor elements with electrical resistance feedback | Ya-Fen Lin, Zhitang Song, Songlin Feng | 2008-04-01 |
| 7329602 | Wiring structure for integrated circuit with reduced intralevel capacitance | Richard S. Wise, Mark C. Hakey, Hongwen Yan | 2008-02-12 |
| 7307308 | Buried bit line non-volatile floating gate memory cell with independent controllable control gate in a trench, and array thereof, and method of formation | Dana Lee, Sohrab Kianian | 2007-12-11 |
| 7245529 | Dynamically tunable resistor or capacitor using a non-volatile floating gate memory cell | Kevin Jew | 2007-07-17 |
| 7242050 | Stacked gate memory cell with erase to gate, array, and method of manufacturing | Hieu Van Tran, Dana Lee, Jack Edward Frayer | 2007-07-10 |
| 7238959 | Phase change memory device employing thermally insulating voids and sloped trench, and a method of making same | — | 2007-07-03 |
| 7227217 | Nonvolatile memory cell having floating gate, control gate and separate erase gate, an array of such memory cells, and method of manufacturing | Amitay Levi, Pavel Klinger, Hieu Van Tran, Dana Lee, Jack Edward Frayer | 2007-06-05 |
| 7208376 | Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried floating gate and pointed channel region | Ying-Kit Tsui, Wen-Juei Lu | 2007-04-24 |
| 7205198 | Method of making a bi-directional read/program non-volatile floating gate memory cell | Sohrab Kianian, Jack Edward Frayer | 2007-04-17 |
| 7190018 | Bi-directional read/program non-volatile floating gate memory cell with independent controllable control gates, and array thereof, and method of formation | Sohrab Kianian, Jack Edward Frayer | 2007-03-13 |
| 7183163 | Method of manufacturing an isolation-less, contact-less array of bi-directional read/program non-volatile floating gate memory cells with independent controllable control gates | Dana Lee | 2007-02-27 |
| 7180127 | Semiconductor memory array of floating gate memory cells with buried floating gate, pointed floating gate and pointed channel region | Dana Lee | 2007-02-20 |
| 7151021 | Bi-directional read/program non-volatile floating gate memory cell and array thereof, and method of formation | Jack Edward Frayer, Dana Lee | 2006-12-19 |
| 7129536 | Non-planar non-volatile memory cell with an erase gate, an array therefor, and a method of making same | Sohrab Kianian, Yaw Wen Hu | 2006-10-31 |