Issued Patents All Time
Showing 25 most recent of 93 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12424522 | Leadless semiconductor packages, leadframes therefor, and methods of making | Darrell D. Truhitte, Soon Wei WANG | 2025-09-23 |
| 12402264 | Stacked power terminals in a power electronics module | Vemmond Jeng Hung NG, Yushuang YAO | 2025-08-26 |
| 12394692 | Power circuit module | Atapol Prajuckamol, Olaf Zschieschang | 2025-08-19 |
| 12374555 | Die sidewall coatings and related methods | Francis J. Carney, Yusheng LIN, Michael J. Seddon, Soon Wei WANG, Eiji KUROSE | 2025-07-29 |
| 12374554 | Semiconductor packages with die including cavities and related methods | Michael J. Seddon, Francis J. Carney, Soon Wei WANG, Eiji KUROSE | 2025-07-29 |
| 12362266 | Low stress asymmetric dual side module | Atapol Prajuckamol, Stephen St. Germain, Yusheng LIN | 2025-07-15 |
| 12355009 | Low stress asymmetric dual side module | Atapol Prajuckamol, Stephen St. Germain, Yusheng LIN | 2025-07-08 |
| 12347812 | Low stress asymmetric dual side module | Atapol Prajuckamol, Stephen St. Germain, Yusheng LIN | 2025-07-01 |
| 12347813 | Semiconductor package and related methods | Erik Nino Tolentino, Vemmond Jeng Hung NG, Shutesh Krishnan | 2025-07-01 |
| 12347755 | Low stress asymmetric dual side module | Atapol Prajuckamol, Stephen St. Germain, Yusheng LIN | 2025-07-01 |
| 12308297 | Semiconductor package system and related methods | Yushuang YAO, Atapol Prajuckamol | 2025-05-20 |
| 12300558 | Substrates and related methods | Atapol Prajuckamol, Yushuang YAO, Vemmond Jeng Hung NG | 2025-05-13 |
| 12283562 | Clip design and method of controlling clip position | Atapol Prajuckamol, Vemmond Jeng Hung NG | 2025-04-22 |
| 12243810 | Semiconductor package with wettable flank and related methods | Hui Min LER, Soon Wei WANG | 2025-03-04 |
| 12211775 | Multiple substrate package systems and related methods | Atapol Prajuckamol, Yusheng LIN | 2025-01-28 |
| 12176272 | Semiconductor package with wettable flank | Hui Min LER, Soon Wei WANG | 2024-12-24 |
| 12040192 | Die sidewall coatings and related methods | Francis J. Carney, Yusheng LIN, Michael J. Seddon, Soon Wei WANG, Eiji KUROSE | 2024-07-16 |
| 12033904 | Semiconductor package system and related methods | Yushuang YAO, Atapol Prajuckamol | 2024-07-09 |
| 11955412 | Low stress asymmetric dual side module | Atapol Prajuckamol, Stephen St. Germain, Yusheng LIN | 2024-04-09 |
| 11948870 | Low stress asymmetric dual side module | Atapol Prajuckamol, Stephen St. Germain, Yusheng LIN | 2024-04-02 |
| 11908699 | Semiconductor packages with die including cavities | Michael J. Seddon, Francis J. Carney, Soon Wei WANG, Eiji KUROSE | 2024-02-20 |
| 11908840 | Low stress asymmetric dual side module | Atapol Prajuckamol, Stephen St. Germain, Yusheng LIN | 2024-02-20 |
| 11901184 | Backmetal removal methods | Michael J. Seddon, Francis J. Carney, Soon Wei WANG, Eiji KUROSE | 2024-02-13 |
| 11894347 | Low stress asymmetric dual side module | Atapol Prajuckamol, Stephen St. Germain, Yusheng LIN | 2024-02-06 |
| 11894234 | Semiconductor packages with die support structure for thin die | Francis J. Carney, Soon Wei WANG, Eiji KUROSE | 2024-02-06 |