Issued Patents All Time
Showing 26–35 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10115730 | Three-dimensional memory device containing structurally reinforced pedestal channel portions and method of making thereof | Naohiro Hosoda, Yanli Zhang, Raghuveer S. Makala, Hiroyuki Tanaka, Ryo Nakamura +1 more | 2018-10-30 |
| 10068651 | Channel pre-charge to suppress disturb of select gate transistors during erase in memory | Vinh Diep, Wei Zhao, Ching-Huang Lu, Yingda Dong | 2018-09-04 |
| 10020314 | Forming memory cell film in stack opening | Liang Pang, Yanli Zhang, Ching-Huang Lu, Yingda Dong | 2018-07-10 |
| 9812462 | Memory hole size variation in a 3D stacked memory | Liang Pang, Yanli Zhang, Yingda Dong | 2017-11-07 |
| 9779948 | Method of fabricating 3D NAND | Yanli Zhang, Ching-Huang Lu, Zhenyu Lu | 2017-10-03 |
| 9748266 | Three-dimensional memory device with select transistor having charge trapping gate dielectric layer and methods of making and operating thereof | Yanli Zhang, Liang Pang, Ching-Huang Lu, Matthias Baenninger, Yingda Dong | 2017-08-29 |
| 9673216 | Method of forming memory cell film | Liang Pang, Yingda Dong, Ching-Huang Lu | 2017-06-06 |
| 9601428 | Semiconductor fuses with nanowire fuse links and fabrication methods thereof | Chun Yu Wong, Jagar Singh, Min-hwa Chi | 2017-03-21 |
| 9508795 | Methods of fabricating nanowire structures | Chun Yu Wong, Min-hwa Chi, Jagar Singh | 2016-11-29 |
| 9275861 | Methods of forming group III-V semiconductor materials on group IV substrates and the resulting substrate structures | Li Yang, Kejia Wang, Bin Yang, Shurong Liang | 2016-03-01 |