Issued Patents All Time
Showing 76–100 of 234 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10672458 | Memory system topologies including a buffer device and an integrated circuit memory device | Ely Tsern, Craig E. Hampel | 2020-06-02 |
| 10665289 | Memory component with independently enabled data and command interfaces | Lei Luo, Liji Gopalakrishnan | 2020-05-26 |
| 10651849 | Transaction-based on-die termination | Kyung Suk Oh | 2020-05-12 |
| 10621120 | Buffer component for asymmetric-channel memory system | Arun Vaidyanath, Sanku Mukherjee | 2020-04-14 |
| 10607685 | Method and apparatus for calibrating write timing in a memory system | Thomas J. Giovannini, Alok Gupta, Steven C. Woo | 2020-03-31 |
| 10607670 | Memory components and controllers that calibrate multiphase synchronous timing references | Thomas J. Giovannini, Scott C. Best, Lei Luo | 2020-03-31 |
| 10593379 | Memory controller with staggered request signal output | Bret G. Stott, Benedict Lau | 2020-03-17 |
| 10558520 | Memory error detection | Craig E. Hampel | 2020-02-11 |
| 10535398 | Memory system topologies including a buffer device and an integrated circuit memory device | Ely Tsern, Craig E. Hampel | 2020-01-14 |
| 10510388 | On-die termination of address and command signals | Kyung Suk Oh | 2019-12-17 |
| 10445226 | Verify before program resume for memory devices | Brent Haukness | 2019-10-15 |
| 10388337 | Memory with deferred fractional row activation | James E. Harris, Thomas Vogelsang, Frederick A. Ware | 2019-08-20 |
| 10381067 | Memory system topologies including a buffer device and an integrated circuit memory device | Ely Tsern, Craig E. Hampel | 2019-08-13 |
| 10380053 | Folded memory modules | Amir Amirkhany, Suresh Rajan, Ravindranath Kollipara, David A. Secker | 2019-08-13 |
| 10380056 | Memory with alternative command interfaces | Liji Gopalakrishnan, Yi Lu | 2019-08-13 |
| 10339990 | Strobe acquisition and tracking | Bret G. Stott, Frederick A. Ware, Yuanlong Wang | 2019-07-02 |
| 10333519 | On-die termination | — | 2019-06-25 |
| 10331587 | Memory controller that uses a specific timing reference signal in connection with a data burst following a specified idle period | Thomas J. Giovannini | 2019-06-25 |
| 10304517 | Method and apparatus for calibrating write timing in a memory system | Thomas J. Giovannini, Alok Gupta, Steven C. Woo | 2019-05-28 |
| 10270442 | Memory component with on-die termination | Kyung Suk Oh | 2019-04-23 |
| 10254987 | Disaggregated memory appliance having a management processor that accepts request from a plurality of hosts for management, configuration and provisioning of memory | Steven Shrader, Harry Rogers, Robert Brennan | 2019-04-09 |
| 10249353 | Memory controller with phase adjusted clock for performing memory operations | Lei Luo | 2019-04-02 |
| 10210102 | Memory access during memory calibration | Frederick A. Ware | 2019-02-19 |
| 10192598 | Memory device comprising programmable command-and-address and/or data interfaces | Lawrence Lai, Fan Ho, David A. Secker, Wayne S. Richardson, Akash Bansal +2 more | 2019-01-29 |
| 10162772 | Clock generation for timing communications with ranks of memory devices | Jared L. Zerbe, John Eble | 2018-12-25 |