Issued Patents All Time
Showing 126–150 of 243 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8212650 | Situationally aware and self-configuring electronic data and communication device | Dave Mooring | 2012-07-03 |
| 8214616 | Memory controller device having timing offset capability | Frederick A. Ware, Richard E. Perego, Craig E. Hampel | 2012-07-03 |
| 8194493 | Low power memory device | Frederick A. Ware, Craig E. Hampel | 2012-06-05 |
| 8127152 | Method of operation of a memory device and system including initialization at a first frequency and operation at a second frequency and a power down exit mode | Richard M. Barth, Craig E. Hampel, Frederick A. Ware, Todd Bystrom, Bradley A. May +1 more | 2012-02-28 |
| 8112608 | Variable-width memory | Richard E. Perego, Donald C. Stark, Frederick A. Ware, Craig E. Hampel | 2012-02-07 |
| 8108607 | Memory system topologies including a buffer device and an integrated circuit memory device | Ian Shaeffer, Craig E. Hampel | 2012-01-31 |
| 8059476 | Control component for controlling a delay interval within a memory component | Frederick A. Ware, Craig E. Hampel, Donald C. Stark | 2011-11-15 |
| 7989265 | Process for making a semiconductor system having devices that have contacts on top and bottom surfaces of each device | Frederick A. Ware, Ian Shaeffer | 2011-08-02 |
| 7986584 | Memory device having multiple power modes | Richard M. Barth, Craig E. Hampel, Donald C. Stark | 2011-07-26 |
| 7965567 | Phase adjustment apparatus and method for a memory device signaling system | Craig E. Hampel, Richard E. Perego, Stefanos Sidiropoulos, Fredrick A. Ware | 2011-06-21 |
| 7916570 | Low power memory device | Frederick A. Ware, Craig E. Hampel | 2011-03-29 |
| 7830735 | Asynchronous, high-bandwidth memory component using calibrated timing elements | Frederick A. Ware, Craig E. Hampel, Donald C. Stark | 2010-11-09 |
| 7831882 | Memory system with error detection and retry modes of operation | Mark A. Horowitz, Frederick A. Ware | 2010-11-09 |
| 7764095 | Clock distribution network supporting low-power mode | Carl W. Werner | 2010-07-27 |
| 7734866 | Memory with address-differentiated refresh rate to accommodate low-retention storage rows | — | 2010-06-08 |
| 7729151 | System including a buffered memory module | Ian Shaeffer, Craig E. Hampel | 2010-06-01 |
| 7701045 | Point-to-point connection topology for stacked devices | Frederick A. Ware, Ian Shaeffer | 2010-04-20 |
| 7685364 | Memory system topologies including a buffer device and an integrated circuit memory device | Ian Shaeffer, Craig E. Hampel | 2010-03-23 |
| 7668276 | Phase adjustment apparatus and method for a memory device signaling system | Craig E. Hampel, Richard E. Perego, Stefanos Sidiropoulos, Fredrick A. Ware | 2010-02-23 |
| 7660183 | Low power memory device | Frederick A. Ware, Craig E. Hampel | 2010-02-09 |
| 7626880 | Memory device having a read pipeline and a delay locked loop | Richard M. Barth, Craig E. Hampel, Donald C. Stark | 2009-12-01 |
| 7610447 | Upgradable memory system with reconfigurable interconnect | Richard E. Perego, Frederick A. Ware, Craig E. Hampel | 2009-10-27 |
| 7592824 | Method and apparatus for test and characterization of semiconductor components | Frederick A. Ware, Scott C. Best, Timothy Chang, Richard Perego, Jeff Mitchell | 2009-09-22 |
| 7581121 | System for a memory device having a power down mode and method | Richard M. Barth, Craig E. Hampel, Frederick A. Ware, Todd Bystrom, Bradley A. May +1 more | 2009-08-25 |
| 7577789 | Upgradable memory system with reconfigurable interconnect | Richard E. Perego, Frederick A. Ware, Craig E. Hampel | 2009-08-18 |