Issued Patents All Time
Showing 1–25 of 97 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11341002 | Differential clock skew detector | Mehran Mohammadi Izad, Aida Varzaghani, Bardia Bozorgzadeh | 2022-05-24 |
| 11232827 | Memory component with pattern register circuitry to provide data patterns for calibration | Craig E. Hampel, Richard E. Perego, Ely Tsern, Frederick A. Ware | 2022-01-25 |
| 10811080 | Memory component with pattern register circuitry to provide data patterns for calibration | Craig E. Hampel, Richard E. Perego, Ely Tsern, Frederick A. Ware | 2020-10-20 |
| 10310999 | Flash memory controller with calibrated data communication | Jared L. Zerbe, Kevin S. Donnelly, Donald C. Stark, Mark A. Horowitz, Leung Yu +5 more | 2019-06-04 |
| 10192609 | Memory component with pattern register circuitry to provide data patterns for calibration | Craig E. Hampel, Richard E. Perego, Ely Tsern, Frederick A. Ware | 2019-01-29 |
| 9998305 | Multi-PAM output driver with distortion compensation | Jared L. Zerbe, Bruno W. Garlepp, Pak Shing Chau, Kevin S. Donnelly, Mark A. Horowitz +2 more | 2018-06-12 |
| 9917655 | Timing-modulated side channel | Athanasios A. Kasapi | 2018-03-13 |
| 9785589 | Memory controller that calibrates a transmit timing offset | Jared L. Zerbe, Kevin S. Donnelly, Donald C. Stark, Mark A. Horowitz, Leung Yu +5 more | 2017-10-10 |
| 9721642 | Memory component with pattern register circuitry to provide data patterns for calibration | Craig E. Hampel, Richard E. Perego, Ely Tsern, Frederick A. Ware | 2017-08-01 |
| 9544169 | Multiphase receiver with equalization circuitry | Jared L. Zerbe, Bruno W. Garlepp, Pak Shing Chau, Kevin S. Donnelly, Mark A. Horowitz +2 more | 2017-01-10 |
| 9515694 | Adaptable rate transceiver | — | 2016-12-06 |
| 9405678 | Flash memory controller with calibrated data communication | Jared L. Zerbe, Kevin S. Donnelly, Donald C. Stark, Mark A. Horowitz, Leung Yu +5 more | 2016-08-02 |
| 9367248 | Memory component with pattern register circuitry to provide data patterns for calibration | Craig E. Hampel, Richard E. Perego, Ely Tsern, Frederick A. Ware | 2016-06-14 |
| 9164933 | Memory system with calibrated data communication | Jared L. Zerbe, Kevin S. Donnelly, Donald C. Stark, Mark A. Horowitz, Leung Yu +5 more | 2015-10-20 |
| 9123433 | Memory component with pattern register circuitry to provide data patterns for calibration | Craig E. Hampel, Richard E. Perego, Ely Tsern, Frederick A. Ware | 2015-09-01 |
| 9099194 | Memory component with pattern register circuitry to provide data patterns for calibration | Craig E. Hampel, Richard E. Perego, Ely Tsern, Frederick A. Ware | 2015-08-04 |
| 9094020 | Multi-value logic signaling in multi-functional circuits | Marc Loinaz, Whay Sing Lee | 2015-07-28 |
| 8948331 | Systems, circuits and methods for filtering signals to compensate for channel effects | Halil Cirit | 2015-02-03 |
| 8948212 | Memory controller with circuitry to set memory device-specific reference voltages | Jared L. Zerbe, Kevin S. Donnelly, Donald C. Stark, Mark A. Horowitz, Leung Yu +5 more | 2015-02-03 |
| 8667038 | Methods and apparatus to increase the resolution of a clock synthesis circuit that uses feedback interpolation | — | 2014-03-04 |
| 8638896 | Repeate architecture with single clock multiplier unit | Dean Liu, Marc Loinaz | 2014-01-28 |
| 8634452 | Multiphase receiver with equalization circuitry | Jared L. Zerbe, Bruno W. Garlepp, Pak Shing Chau, Kevin S. Donnelly, Mark A. Horowitz +2 more | 2014-01-21 |
| 8630317 | Memory system with calibrated data communication | Jared L. Zerbe, Kevin S. Donnelly, Donald C. Stark, Mark A. Horowitz, Leung Yu +5 more | 2014-01-14 |
| 8618967 | Systems, circuits, and methods for a sigma-delta based time to digital converter | Parastoo Nikaeen, Marc Loinaz | 2013-12-31 |
| 8599983 | Methods and apparatus for clock and data recovery using transmission lines | Haw-Jyh Liaw | 2013-12-03 |