Issued Patents All Time
Showing 1–25 of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10782344 | Technique for determining performance characteristics of electronic devices and systems | Xingchao Yuan, Mark A. Horowitz | 2020-09-22 |
| 9977076 | Technique for determining performance characteristics of electronic devices and systems | Xingchao Yuan, Mark A. Horowitz | 2018-05-22 |
| 9562934 | Technique for determining performance characteristics of electronic devices and systems | Xingchao Yuan, Mark A. Horowitz | 2017-02-07 |
| 8599983 | Methods and apparatus for clock and data recovery using transmission lines | Stefanos Sidiropoulos | 2013-12-03 |
| 8489345 | Technique for determining performance characteristics of electronic devices and systems | Xiangchao Yuan, Mark A. Horowitz | 2013-07-16 |
| 8364878 | Memory module having signal lines configured for sequential arrival of signals at a plurality of memory devices | David Nguyen | 2013-01-29 |
| 8214575 | Memory module having signal lines configured for sequential arrival of signals at synchronous memory devices | David Nguyen | 2012-07-03 |
| 8155236 | Methods and apparatus for clock and data recovery using transmission lines | Stefanos Sidiropoulos | 2012-04-10 |
| 8102936 | Methods and apparatus for clock and data recovery using transmission lines | Stefanos Sidiropoulos | 2012-01-24 |
| 8055458 | Technique for determining performance characteristics of electronic devices and systems | Xiangchao Yuan, Mark A. Horowitz | 2011-11-08 |
| 7870322 | Memory module having signal lines configured for sequential arrival of signals at synchronous memory devices | David Nguyen | 2011-01-11 |
| 7856570 | Method and apparatus for shaping electronic pulses | Shwetabh Verma | 2010-12-21 |
| 7542857 | Technique for determining performance characteristics of electronic devices and systems | Xiangchao Yuan, Mark A. Horowitz | 2009-06-02 |
| 7523244 | Memory module having memory devices on two sides | David Nguyen | 2009-04-21 |
| 7523246 | Memory system having memory devices on two sides | David Nguyen | 2009-04-21 |
| 7523247 | Memory module having a clock line and termination | David Nguyen | 2009-04-21 |
| 7519757 | Memory system having a clock line and termination | David Nguyen | 2009-04-14 |
| 7269212 | Low-latency equalization in multi-level, multi-line communication systems | Pak Shing Chau, Jun Kim, Jared L. Zerbe | 2007-09-11 |
| 7162672 | Multilevel signal interface testing with binary test apparatus by emulation of multilevel signals | Carl W. Werner, Jared L. Zerbe, William Stonecypher, Timothy Chang | 2007-01-09 |
| 7134101 | Active impedance compensation | Donald V. Perino, Pak Shing Chau, Kevin S. Donnelly | 2006-11-07 |
| 7130944 | Chip-to-chip communication system using an ac-coupled bus and devices employed in same | Donald V. Perino, Alfredo Moncayo, Kevin S. Donnelly, Richard M. Barth, Bruno W. Garlepp | 2006-10-31 |
| 7085872 | High frequency bus system | David Nguyen | 2006-08-01 |
| 7006932 | Technique for determining performance characteristics of electronic devices and systems | Xingchao Yuan, Mark A. Horowitz | 2006-02-28 |
| 6920402 | Technique for determining performance characteristics of electronic devices and systems | Xingchao Yuan, Mark A. Horowitz | 2005-07-19 |
| 6854030 | Integrated circuit device having a capacitive coupling element | Donald V. Perino, Alfredo Moncayo, Kevin S. Donnelly, Richard M. Barth, Bruno W. Garlepp | 2005-02-08 |