Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Marc Loinaz — 29 Patents

NMNetlogic Microsystems: 13 patents #14 of 186Top 8%
ASAnacapa Semiconductor: 6 patents #1 of 1Top 100%
AGAgere Systems Guardian: 3 patents #85 of 810Top 15%
Broadcom: 3 patents #3,179 of 9,346Top 35%
ASAgere Systems: 1 patents #984 of 1,849Top 55%
ATAT&T: 1 patents #10,636 of 18,772Top 60%
New York, NY: #476 of 20,192 inventorsTop 3%
New York: #4,236 of 115,490 inventorsTop 4%
Overall (All Time): #127,851 of 4,157,543Top 4%
29 Patents All Time
Marc Loinaz has been granted 29 US patents while listed as an inventor at Netlogic Microsystems. The first was granted in 2000 and the most recent in December 2024. Marc Loinaz ranks #127,851 of 4,157,543 US inventors in our database (top 3.1%). Patent records list Marc Loinaz in New York, NY, US.

Patents per Year

Patents granted per year, 2000 to 2024Bar chart with a peak of 5 patents in 2013.peak 52000: 1 patents20002002: 3 patents2004: 2 patents20042006: 1 patents2008: 3 patents20082009: 1 patents2010: 1 patents20102011: 2 patents2013: 5 patents20132014: 2 patents2015: 2 patents20152021: 1 patents2022: 1 patents20222023: 1 patents2024: 3 patents2024

Issued Patents All Time

Showing 1–25 of 29 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12166570 High precision multi-chip clock synchronization 2024-12-10
12081223 Lidar system with a time synchronized sensor network for precision sensing 2024-09-03
12021536 Positron emission tomography system with a time synchronized network 2024-06-25
11619719 Time coherent network 2023-04-04
11480514 Fluorescence lifetime imaging (FLIM) and flow cytometry applications for a time synchronized sensor network 2022-10-25
10911171 High precision multi-chip clock synchronization 2021-02-02
9094020 Multi-value logic signaling in multi-functional circuits Stefanos Sidiropoulos, Whay Sing Lee 2015-07-28 $8,895,000
8964905 Low power serial link 2015-02-24
8700944 Programmable drive strength in memory signaling 2014-04-15
8638896 Repeate architecture with single clock multiplier unit Dean Liu, Stefanos Sidiropoulos 2014-01-28
8618967 Systems, circuits, and methods for a sigma-delta based time to digital converter Parastoo Nikaeen, Stefanos Sidiropoulos 2013-12-31 $1,998,000
8552767 Systems, circuits, and methods for a digital frequency synthesizer Parastoo Nikaeen, Stefanos Sidiropoulos 2013-10-08 $3,890,000
8520744 Multi-value logic signaling in multi-functional circuits Stefanos Sidiropoulos, Whay Sing Lee 2013-08-27
8433018 Methods and apparatus for frequency synthesis with feedback interpolation Stefanos Sidiropoulos, R. Sekhar Narayanaswami, Nikhil Acharya, Dean Liu 2013-04-30
8423814 Programmable drive strength in memory signaling 2013-04-16
8000412 Low power serial link 2011-08-16 $14,894,000
7919957 Digital linear voltage regulator Shwetabh Verma 2011-04-05 $4,891,000
7679345 Digital linear voltage regulator Shwetabh Verma 2010-03-16 $15,378,000
7532697 Methods and apparatus for clock and data recovery using a single source Stefanos Sidiropoulos 2009-05-12 $9,959,000
7436229 Methods and apparatus for minimizing jitter in a clock synthesis circuit that uses feedback interpolation Stefanos Sidiropoulos, R. Shekhar Narayanaswami, Nikhil Acharya, Dean Liu 2008-10-14 $2,100,000
7432750 Methods and apparatus for frequency synthesis with feedback interpolation Stefanos Sidiropoulos, R. Shekhar Narayanaswami, Nikhil Acharya, Dean Liu 2008-10-07 $3,638,000
7323916 Methods and apparatus for generating multiple clocks using feedback interpolation Stefanos Sidiropoulos, R. Shekhar Narayanaswami, Nikhil Acharya, Dean Liu 2008-01-29 $1,788,000
7009425 Methods and apparatus for improving large signal performance for active shunt-peaked circuits Arnold Feldman 2006-03-07
6788103 Activ shunt-peaked logic gates Arnold Feldman 2004-09-07
6677995 Array readout system Andrew J. Blanksby 2004-01-13