Issued Patents All Time
Showing 51–75 of 97 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7489756 | Slave device with calibration signal generator for synchronous memory system | — | 2009-02-10 |
| 7466784 | Apparatus and method for controlling a master/slave system via master device synchronization | — | 2008-12-16 |
| 7456778 | Method and apparatus for calibrating a multi-level current mode driver having a plurality of source calibration signals | Carl W. Werner, Mark A. Horowitz, Pak Shing Chau, Scott C. Best | 2008-11-25 |
| 7443215 | Methods and apparatus to increase the resolution of a clock synthesis circuit that uses feedback interpolation | — | 2008-10-28 |
| 7436229 | Methods and apparatus for minimizing jitter in a clock synthesis circuit that uses feedback interpolation | Marc Loinaz, R. Shekhar Narayanaswami, Nikhil Acharya, Dean Liu | 2008-10-14 |
| 7432750 | Methods and apparatus for frequency synthesis with feedback interpolation | Marc Loinaz, R. Shekhar Narayanaswami, Nikhil Acharya, Dean Liu | 2008-10-07 |
| 7398413 | Memory device signaling system and method with independent timing calibration for parallel signal paths | Craig E. Hampel, Richard E. Perego, Ely Tsern, Fredrick A. Ware | 2008-07-08 |
| 7337294 | Method and apparatus for adjusting the performance of a synchronous memory system | Bruno W. Garlepp, Pak Shing Chau, Kevin S. Donnelly, Clemenz Portmann, Donald C. Stark +3 more | 2008-02-26 |
| 7323916 | Methods and apparatus for generating multiple clocks using feedback interpolation | Marc Loinaz, R. Shekhar Narayanaswami, Nikhil Acharya, Dean Liu | 2008-01-29 |
| 7320047 | System having a controller device, a buffer device and a plurality of memory devices | Richard E. Perego, Ely Tsern | 2008-01-15 |
| 7206897 | Memory module having an integrated circuit buffer device | Richard E. Perego, Ely Tsern | 2007-04-17 |
| 7206896 | Integrated circuit buffer device | Richard E. Perego, Ely Tsern | 2007-04-17 |
| 7200710 | Buffer device and method of operation in a buffer device | Richard E. Perego, Ely Tsern | 2007-04-03 |
| 7149856 | Method and apparatus for adjusting the performance of a synchronous memory system | Bruno W. Garlepp, Pak Shing Chau, Kevin S. Donnelly, Clemenz Portmann, Donald C. Stark +3 more | 2006-12-12 |
| 7124221 | Low latency multi-level communication interface | Jared L. Zerbe, Bruno W. Garlepp, Pak Shing Chau, Kevin S. Donnelly, Mark A. Horowitz +2 more | 2006-10-17 |
| 7099395 | Reducing coupled noise in pseudo-differential signaling systems | Yingxuan Li, Mark A. Horowitz | 2006-08-29 |
| 7093145 | Method and apparatus for calibrating a multi-level current mode driver having a plurality of source calibration signals | Carl W. Werner, Mark A. Horowitz, Pak Shing Chau, Scott C. Best | 2006-08-15 |
| 7062597 | Integrated circuit buffer device | Richard E. Perego, Ely Tsern | 2006-06-13 |
| 7051151 | Integrated circuit buffer device | Richard E. Perego, Ely Tsern | 2006-05-23 |
| 7042914 | Calibrated data communication system and method | Jared L. Zerbe, Kevin S. Donnelly, Donald C. Stark, Mark A. Horowitz, Leung Yu +5 more | 2006-05-09 |
| 7017002 | System featuring a master device, a buffer device and a plurality of integrated circuit memory devices | Richard E. Perego, Ely Tsern | 2006-03-21 |
| 7012330 | Integrated circuit device having I/O structures with reduced input loss | Joe-Anand Louis-Chandran | 2006-03-14 |
| 7010642 | System featuring a controller device and a memory module that includes an integrated circuit buffer device and a plurality of integrated circuit memory devices | Richard E. Perego, Ely Tsern | 2006-03-07 |
| 7003618 | System featuring memory modules that include an integrated circuit buffer devices | Richard E. Perego, Ely Tsern | 2006-02-21 |
| 7000062 | System and method featuring a controller device and a memory module that includes an integrated circuit buffer device and a plurality of integrated circuit memory devices | Richard E. Perego, Ely Tsern | 2006-02-14 |