Issued Patents All Time
Showing 76–97 of 97 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6987823 | System and method for aligning internal transmit and receive clocks | Donald C. Stark, Jun Kim | 2006-01-17 |
| 6954095 | Apparatus and method for generating clock signals | Benedict Lau | 2005-10-11 |
| 6950956 | Integrated circuit with timing adjustment mechanism and method | Jared L. Zerbe, Kevin S. Donnelly, Donald C. Stark, Mark A. Horowitz, Leung Yu +5 more | 2005-09-27 |
| 6928128 | Clock alignment circuit having a self regulating voltage supply | — | 2005-08-09 |
| 6920540 | Timing calibration apparatus and method for a memory device signaling system | Craig E. Hampel, Richard E. Perego, Ely Tsern, Fredrick A. Ware | 2005-07-19 |
| 6839393 | Apparatus and method for controlling a master/slave system via master device synchronization | — | 2005-01-04 |
| 6809600 | Dual loop phase lock loops using dual voltage supply regulators | Kun-Yung Chang, Yingxuan Li | 2004-10-26 |
| 6772351 | Method and apparatus for calibrating a multi-level current mode driver | Carl W. Werner, Mark A. Horowitz, Pak Shing Chau, Scott C. Best | 2004-08-03 |
| 6731148 | Apparatus and method for generating clock signals | Benedict Lau | 2004-05-04 |
| 6643787 | Bus system optimization | Jared L. Zerbe, Kevin S. Donnelly, Donald C. Stark, Mark A. Horowitz, Leung Yu +5 more | 2003-11-04 |
| 6618786 | Current-mode bus line driver having increased output impedance | Yingxuan Li | 2003-09-09 |
| 6573779 | Duty cycle integrator with tracking common mode feedback control | Yingxuan Li | 2003-06-03 |
| 6553452 | Synchronous memory device having a temperature register | Bruno W. Garlepp, Pak Shing Chau, Kevin S. Donnelly, Clemenz Portmann, Donald C. Stark +3 more | 2003-04-22 |
| 6522199 | Reconfigurable dual-mode multiple stage operational amplifiers | Yingxuan Li | 2003-02-18 |
| 6513103 | Method and apparatus for adjusting the performance of a synchronous memory system | Bruno W. Garlepp, Pak Shing Chau, Kevin S. Donnelly, Clemenz Portmann, Donald C. Stark +3 more | 2003-01-28 |
| 6504438 | Dual loop phase lock loops using dual voltage supply regulators | Kun-Yung Chang, Yingxuan Li | 2003-01-07 |
| 6502161 | Memory system including a point-to-point linked memory subsystem | Richard E. Perego, Ely Tsern | 2002-12-31 |
| 6469555 | Apparatus and method for generating multiple clock signals from a single loop circuit | Benedict Lau | 2002-10-22 |
| 6448828 | Apparatus and method for edge based duty cycle conversion | Donald C. Stark | 2002-09-10 |
| 6323706 | Apparatus and method for edge based duty cycle conversion | Donald C. Stark | 2001-11-27 |
| 6232796 | Apparatus and method for detecting two data bits per clock edge | Pradeep Batra | 2001-05-15 |
| 6133773 | Variable delay element | Bruno W. Garlepp, Pak Shing Chau, Kevin S. Donnelly, Clemenz Portmann, Donald C. Stark +3 more | 2000-10-17 |