Issued Patents All Time
Showing 76–100 of 243 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9515008 | Techniques for interconnecting stacked dies using connection sites | Frederick A. Ware, Thomas Vogelsang | 2016-12-06 |
| 9472262 | Memory controller | Frederick A. Ware, Richard E. Perego, Craig E. Hampel | 2016-10-18 |
| 9459960 | Controller device for use with electrically erasable programmable memory chip with error detection and retry modes of operation | Mark A. Horowitz, Frederick A. Ware | 2016-10-04 |
| 9430324 | Memory repair method and apparatus based on error code tracking | Frederick A. Ware | 2016-08-30 |
| 9411678 | DRAM retention monitoring method for dynamic error correction | Frederick A. Ware, Suresh Rajan, Thomas Vogelsang, Wayne F. Ellis | 2016-08-09 |
| 9390782 | Memory with refresh logic to accommodate low-retention storage rows | Scott C. Best | 2016-07-12 |
| 9367248 | Memory component with pattern register circuitry to provide data patterns for calibration | Craig E. Hampel, Richard E. Perego, Stefanos Sidiropoulos, Frederick A. Ware | 2016-06-14 |
| 9311976 | Memory module | Frederick A. Ware, Richard E. Perego, Craig E. Hampel | 2016-04-12 |
| 9298609 | Memory controller supporting nonvolatile physical memory | Frederick A. Ware | 2016-03-29 |
| 9287239 | Techniques for interconnecting stacked dies using connection sites | Frederick A. Ware, Thomas Vogelsang | 2016-03-15 |
| 9274892 | Memory chip with error detection and retry modes of operation | Mark A. Horowitz, Frederick A. Ware | 2016-03-01 |
| 9257151 | Printed-circuit board supporting memory systems with multiple data-bus configurations | Richard E. Perego, Donald C. Stark, Frederick A. Ware, Craig E. Hampel | 2016-02-09 |
| 9256376 | Methods and circuits for dynamically scaling DRAM power and performance | Thomas Vogelsang, Craig E. Hampel, Scott C. Best | 2016-02-09 |
| 9257159 | Low power memory device | Frederick A. Ware, Craig E. Hampel | 2016-02-09 |
| 9141479 | Memory system with error detection and retry modes of operation | Mark A. Horowitz, Frederick A. Ware | 2015-09-22 |
| 9123433 | Memory component with pattern register circuitry to provide data patterns for calibration | Craig E. Hampel, Richard E. Perego, Stefanos Sidiropoulos, Frederick A. Ware | 2015-09-01 |
| 9117035 | Memory system topologies including a buffer device and an integrated circuit memory device | Ian Shaeffer, Craig E. Hampel | 2015-08-25 |
| 9099194 | Memory component with pattern register circuitry to provide data patterns for calibration | Craig E. Hampel, Richard E. Perego, Stefanos Sidiropoulos, Frederick A. Ware | 2015-08-04 |
| 9053778 | Memory controller that enforces strobe-to-strobe timing offset | Frederick A. Ware, Richard E. Perego, Craig E. Hampel | 2015-06-09 |
| 8930779 | Bit-replacement technique for DRAM error correction | Frederick A. Ware, Thomas Vogelsang | 2015-01-06 |
| 8918703 | Memory system with error detection and retry modes of operation | Mark A. Horowitz, Frederick A. Ware | 2014-12-23 |
| 8824224 | Frequency-agile strobe window generation | Frederick A. Ware, Brian S. Leibowitz | 2014-09-02 |
| 8811095 | Methods and circuits for dynamically scaling DRAM power and performance | Thomas Vogelsang, Craig E. Hampel, Scott C. Best | 2014-08-19 |
| 8769234 | Memory modules and devices supporting configurable data widths | Richard E. Perego, Donald C. Stark, Frederick A. Ware, Craig E. Hampel | 2014-07-01 |
| 8760944 | Memory component that samples command/address signals in response to both edges of a clock signal | Frederick A. Ware, Richard E. Perego, Craig E. Hampel | 2014-06-24 |